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LOW NOISE AND LOSS BIASING CIRCUIT

  • US 20140120845A1
  • Filed: 10/29/2013
  • Published: 05/01/2014
  • Est. Priority Date: 10/30/2012
  • Status: Abandoned Application
First Claim
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1. A bias circuit of a wireless data transceiver, the bias circuit comprising:

  • a first transistor, a gate of the first transistor configured to receive an input signal;

    a second transistor;

    a third transistor, wherein a gate of the second transistor is coupled to a gate of the third transistor and a drain of the first transistor, wherein a source of the second transistor and a source of the third transistor are coupled to a supply voltage;

    a fourth transistor; and

    a low pass filter, wherein a drain of the third transistor and a drain and a gate of the fourth transistor are coupled to the low pass filter, and wherein an output of the low pass filter is an output signal,wherein the bias circuit is configured to reduce an amount of noise injected into an analog or digital device when measuring a characteristic of the analog or digital device.

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