LOW NOISE AND LOSS BIASING CIRCUIT

• US 20140120845A1
• Filed: 10/29/2013
• Published: 05/01/2014
• Est. Priority Date: 10/30/2012
• Status: Abandoned Application

• Current Assignee: Maja Systems, Inc
• Original Assignee: Anayas360.Com, LLC
• Inventors: Laskar, Joy
• Application Number:
  US14/066,527
• Publication Number:
  US 20140120845A1
• Time in Patent Office: Days
• US Class Current: 455/73
• CPC Class Codes: G06F 13/4068 Electrical coupling
• CPC Class Codes: G06F 13/42 Bus transfer protocol, e.g. handshake; Synchronisation
• CPC Class Codes: H03G 3/3042 in modulators, frequency-changers, transmitters or power amplifiers transmission power control in bidirectional transmission systems H04W52/04
• CPC Class Codes: H04B 1/40 Circuits
• CPC Class Codes: H04B 1/403 using the same oscillator for generating both the transmitter frequency and the receiver local oscillator frequency
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A bias circuit of a wireless data transceiver comprises a first transistor, a second transistor, a third transistor, a fourth transistor, and a low pass filter. A gate of the first transistor received an input signal. A gate of the second transistor is coupled to a gate of the third transistor and a drain of the first transistor. A source of the second transistor and a source of the third transistor are coupled to a supply voltage. A drain of the third transistor and a drain and a gate of the fourth transistor are coupled to the low pass filter. An output of the low pass filter is an output signal. The bias circuit is configured to reduce an amount of noise injected into an analog or digital device when measuring characteristics of the analog or digital device.

Claims

1. A bias circuit of a wireless data transceiver, the bias circuit comprising:

a first transistor, a gate of the first transistor configured to receive an input signal;

a second transistor;

a third transistor, wherein a gate of the second transistor is coupled to a gate of the third transistor and a drain of the first transistor, wherein a source of the second transistor and a source of the third transistor are coupled to a supply voltage;

a fourth transistor; and

a low pass filter, wherein a drain of the third transistor and a drain and a gate of the fourth transistor are coupled to the low pass filter, and wherein an output of the low pass filter is an output signal,

wherein the bias circuit is configured to reduce an amount of noise injected into an analog or digital device when measuring a characteristic of the analog or digital device.

2. The bias circuit of claim 1, wherein the output signal is a representation of the input signal.

3. The bias circuit of claim 2, wherein the input signal has a first frequency and the output signal has a second frequency, wherein the first frequency is greater than the second frequency.

4. The bias circuit of claim 1, wherein the input signal is a signal in a radio frequency (RF) path of the analog or digital device.

5. The bias circuit of claim 4, wherein the output signal is used to adjust the signal in the RF path of the analog or digital device.

6. The bias circuit of claim 4, wherein a controller is coupled to the output of the low pass filter to measure at least one of amplitude, gain, noise, phase, or variation of the signal in the RF path.

7. The bias circuit of claim 1, wherein the input signal is isolated from the supply voltage.

8. The bias circuit of claim 1, wherein the low pass filter comprises a resistor coupled between the drain of the fourth transistor and the output of the low pass filter, and wherein the low pass filter comprises a capacitor coupled between the output of the low pass filter and ground.

9. The bias circuit of claim 1, wherein a source of the first transistor and a source of the fourth transistor are coupled to ground.

10. A bias circuit of a wireless data transceiver, the bias circuit comprising:

an active circuit configured to receive an input signal, the active circuit comprising a decoupling circuit configured to decouple the input signal from a supply voltage; and

a passive circuit coupled to the active circuit, wherein the passive circuit is configured to filter the input signal and generate an output signal based on the filtered input signal,

wherein the bias circuit is configured to reduce an amount of noise injected into an analog or digital device when measuring characteristics of the analog or digital device.

11. The bias circuit of claim 10, wherein the active circuit comprises a first transistor, a second transistor, a third transistor, and a fourth transistor, wherein a gate of the first transistor receives the input signal, wherein a gate of the second transistor is coupled to a gate of the third transistor and a drain of the first transistor, and wherein a source of the second transistor and a source of the third transistor are coupled to the supply voltage.

12. The bias circuit of claim 11, wherein the passive circuit comprises a low pass filter, wherein a drain of the third transistor and a drain and a gate of the fourth transistor are coupled to the low pass filter, and wherein an output of the low pass filter is the output signal.

13. The bias circuit of claim 12, wherein the low pass filter comprises a resistor coupled between the drain of the fourth transistor and the output of the low pass filter, and wherein the low pass filter comprises a capacitor coupled between the output of the low pass filter and ground.

14. The bias circuit of claim 12, wherein a source of the first transistor and a source of the fourth transistor are coupled to ground.

15. The bias circuit of claim 10, wherein the output signal is a representation of the input signal.

16. The bias circuit of claim 15, wherein the input signal has a first frequency and the output signal has a second frequency, wherein the first frequency is greater than the second frequency.

17. The bias circuit of claim 10, wherein the input signal is a signal in a radio frequency (RF) path of the analog or digital device.

18. The bias circuit of claim 17, wherein the output signal is used to adjust the signal in the RF path of the analog or digital device.

19. The bias circuit of claim 17, wherein a controller is coupled to an output of the passive circuit to measure at least one of amplitude, gain, noise, phase, or variation of the signal in the RF path.