HIERARCHICAL FLASH TRANSLATION LAYER

• US 20140122781A1
• Filed: 10/30/2013
• Published: 05/01/2014
• Est. Priority Date: 10/30/2012
• Status: Active Grant

• Current Assignee: OVH US LLC (OVH Groupe)
• Original Assignee: Mangstor, Inc. (OVH SAS)
• Inventors: Smith, Trevor, Kamath, Ashwin, Bodapatti, Ganesh
• Granted Patent: US 9,304,904 B2
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 11/1441 Resetting or repowering
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0804 with main memory updating G06F12/0806 takes precedence
• CPC Class Codes: G06F 12/0866 for peripheral storage systems, e.g. disk cache

Abstract

A flash memory system comprises a flash device operable to store data in a plurality of physical blocks assigned to a plurality of sections, a plurality of Flash Translation Tables stored in a memory comprising a Forward Translation Table that maps a Section to a plurality of physical blocks, and a Sector Translation Table for each Section, the Sector Translation Table operable to map to a Physical Page Number identifying a particular Page, a Page Offset identifying a particular location within the Page, and a Section Local Block Table comprising Block Physical Addresses indexed by a Section Local Block Table ID.

Claims

1. A method for translating a logical address to a physical address in a flash memory, comprising:

receiving a Logical Sector Number as the location for a data access operation;

using the Logical Sector Number to obtain a {Section ID, Section Relative Sector ID} tuple;

using the Section ID to identify and access one of a plurality of Sector Translation Tables;

accessing the identified Sector Translation Table using Section Relative Sector ID as an index to access a {Section Local Block Table ID, Physical Page Number, Page Offset} tuple;

using the Section Local Block Table ID to identify a physical block in the flash memory that is represented by a {Flash Device ID, DIE, Logical Unit, Block Number} tuple; and

accessing a particular location in the physical block of the flash memory identified by the {Flash Device ID, DIE, Logical Unit, Block Number, Physical Page Number, Page Offset} tuple.

2. The method of claim 1, wherein using the Logical Sector Number to obtain a {Section ID, Section Relative Sector ID} tuple comprises determining {Section ID=Logical Sector Number±

Number of Sections, Section Relative Sector ID=Logical Sector Number MOD Number of Sections}.

3. The method of claim 1, further comprising:

identifying a plurality of blocks in a die in the flash memory with a NextWrite Section Relative Block ID (NWSRBID); and

writing data to the plurality of blocks identified by NWSRBID in a single write operation.

4. A method for an hierarchical flash translation layer for a flash device, comprising:

forming a table that maps a fixed number of Physical Blocks in the flash device to Section Numbers; and

forming a Sector Translation Table for each Section Number, the Sector Translation Table operable to map to a Physical Page Number identifying a particular Page, a Page Offset identifying a particular location within the Page, and a Section Local Block Table comprising Block Physical Addresses indexed by a Section Local Block Table ID.

5. A method for booting a flash memory device comprising:

determining a Section ID for a boot sector;

loading a Section Local Block Table for the section identified by the Section ID, the Section Local Block Table containing the address of a plurality of blocks;

reading data in the blocks identified in the Section Local Block Table to initialize a Sector Translation Table for the section identified by the Section ID;

determining a Section Relative Sector ID;

accessing the identified Sector Translation Table using Section Relative Sector ID as an index to access a {Section Local Block Table ID, Physical Page Number, Page Offset} tuple;

using the Section Local Block Table ID to identify a physical block in the flash memory that is represented by a {Flash Device ID, DIE, Logical Unit, Block Number} tuple; and

accessing a particular location in the physical block of the flash memory containing boot records identified by the {Flash Device ID, DIE, Logical Unit, Block Number, Physical Page Number, Page Offset} tuple.

6. A flash memory system comprising:

a flash device operable to store data in a plurality of physical blocks assigned to a plurality of sections;

hierarchical Flash Translation Tables stored in a memory; and

a plurality of DSP core processors operable to process, in parallel, a plurality of Flash Translation Table lookup operations each associated with a section of the flash device.

7. The flash memory system of claim 6, wherein the hierarchical Flash Translation Tables comprises:

a Forward Translation Table that maps a Section to a plurality of physical blocks;

a Sector Translation Table for each Section, the Sector Translation Table operable to map to a Physical Page Number identifying a particular Page, a Page Offset identifying a particular location within the Page, and a Section Local Block Table comprising Block Physical Addresses indexed by a Section Local Block Table ID.

8. A flash memory system comprising:

a flash device operable to store data in a plurality of physical blocks assigned to a plurality of sections;

a plurality of Flash Translation Tables stored in a memory comprising;

a Forward Translation Table that maps a Section to a plurality of physical blocks; and

a Sector Translation Table for each Section, the Sector Translation Table operable to map to a Physical Page Number identifying a particular Page, a Page Offset identifying a particular location within the Page, and a Section Local Block Table comprising Block Physical Addresses indexed by a Section Local Block Table ID.

9. The system of claim 8 further comprising a plurality of DSP core processors operable to process, in parallel, a plurality of Flash Translation Table lookup operations each associated with a section of the flash device.