APPARATUS AND METHOD OF OPERATING MEMORY DEVICE
First Claim
1. A memory system comprising:
- a nonvolatile memory device comprising a plurality of memory cells into which data is programmed; and
a controller to control the nonvolatile memory device,wherein;
the controller comprises;
a microprocessor to change a first read voltage, which is used to determine whether the data stored in the memory cells is a first voltage state or a second voltage state, to a first select read voltage which is any one of a first number of first candidate voltages different from each other by a first voltage and to change a second read voltage, which is used to determine whether the data stored in the memory cells is a third voltage state or a fourth voltage state, to a second select read voltage which is any one of a second number of second candidate voltages different from each other by a second voltage which is different from the first voltage;
an error correction code (ECC) encoder to create data added with parity bits by performing ECC encoding on data which is to be provided to the nonvolatile memory device; and
an ECC decoder to correct error bits of the data added with the parity bits; and
the nonvolatile memory device comprises;
a voltage generator to generate the first and second read voltages, the first candidate voltages, and the second candidate voltages;
an X decoder to receive the first and second read voltages and the first and second select read voltages generated by the voltage generator and to drive the memory cells using the first and second read voltages and the first and second select read voltages; and
a register to store the first and second select read voltages.
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Accused Products
Abstract
A memory device useable with a memory system includes a voltage generator to a plurality of first candidate voltages and a plurality of second candidate voltages, and an X decoder to sequentially apply each of the plurality of first candidate voltages and each of the plurality of second candidate voltages to one or more cells of a memory cell array, and then to apply one of the plurality of first candidate voltages and one of the plurality of second candidate voltages as a first read voltage and a second voltage, respectively, to read data from the cells of the memory cell array according to a characteristic of the cells of the memory cell array.
28 Citations
20 Claims
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1. A memory system comprising:
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a nonvolatile memory device comprising a plurality of memory cells into which data is programmed; and a controller to control the nonvolatile memory device, wherein; the controller comprises; a microprocessor to change a first read voltage, which is used to determine whether the data stored in the memory cells is a first voltage state or a second voltage state, to a first select read voltage which is any one of a first number of first candidate voltages different from each other by a first voltage and to change a second read voltage, which is used to determine whether the data stored in the memory cells is a third voltage state or a fourth voltage state, to a second select read voltage which is any one of a second number of second candidate voltages different from each other by a second voltage which is different from the first voltage; an error correction code (ECC) encoder to create data added with parity bits by performing ECC encoding on data which is to be provided to the nonvolatile memory device; and an ECC decoder to correct error bits of the data added with the parity bits; and the nonvolatile memory device comprises; a voltage generator to generate the first and second read voltages, the first candidate voltages, and the second candidate voltages; an X decoder to receive the first and second read voltages and the first and second select read voltages generated by the voltage generator and to drive the memory cells using the first and second read voltages and the first and second select read voltages; and a register to store the first and second select read voltages. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method of operating a memory device, the method comprising:
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changing a first read voltage, which is used to determine whether data stored in memory cells is a first voltage state or a second voltage state, to a first select read voltage which is any one of a first number of first candidate voltages different from each other by a first voltage; and changing a second read voltage, which is used to determine whether the data stored in the memory cells is a third voltage state or a fourth voltage state, to a second select read voltage which is any one of a second number of second candidate voltages different from each other by a second voltage which is different from the first voltage, wherein the changing of the first read voltage to the first select read voltage comprises applying the first candidate voltages sequentially from a first start candidate voltage at intervals of the first voltage and selecting a previous first candidate voltage as the first select read voltage if a number of failed cells is smaller when the previous first candidate voltage is applied to the memory cells than when a present first candidate voltage is applied to the memory cells, and the changing of the second read voltage to the second select read voltage comprises applying the second candidate voltages sequentially from a second start candidate voltage at intervals of the second voltage and selecting a previous second candidate voltage as the second select read voltage if the number of failed cells is smaller when the previous candidate voltage is applied to the memory cells than when a current candidate voltage is applied to the memory cells. - View Dependent Claims (12, 13, 14, 15)
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16. A memory device useable with a memory system, comprising:
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a voltage generator to generate a plurality of first candidate voltages and a plurality of second candidate voltages; and an X decoder to sequentially apply each of the plurality of first candidate voltages and each of the plurality of second candidate voltages to one or more cells of a memory cell array, and then to apply one of the plurality of first candidate voltages and one of the plurality of second candidate voltages as a first read voltage and a second voltage, respectively, to read data from the cells of the memory cell array according to a characteristic of the cells of the memory cell array. - View Dependent Claims (17, 18, 19, 20)
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Specification