Relay Attack Prevention Using RSSIPPLX

• US 20140132391A1
• Filed: 11/14/2012
• Published: 05/15/2014
• Est. Priority Date: 11/14/2012
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Eder, Manfred
• Granted Patent: US 9,558,607 B2
• Time in Patent Office: Days
• US Class Current: 340/5.21
• CPC Class Codes: G07C 2009/00555 comprising means to detect or avoid relay attacks
• CPC Class Codes: G07C 9/00309 operated with bidirectional data transmission between data carrier and locks

Abstract

The disclosed invention relates to a passive keyless entry receiver system having an application controller that is activated upon receipt of an entire payload of a data packet to determine if peak RSSI levels for a plurality of RSSI steps within the payload match an expected sequence of peak RSSI levels (i.e., if a fingerprint is genuine). The receiver system has a receiver that receives a wireless signal having a data packet with a plurality of power levels within a plurality of RSSI steps of the payload. The receiver system writes a plurality of peak RSSI levels to a plurality of RSSI peak payload registers that store the peak RSSI levels for RSSI steps of the payload. Once an entire payload of a data packet has been received an application controller determines if the peak payloads correspond to an expected sequence of power levels.

Claims

1. A passive keyless entry receiver system, comprising:

a receiver configured to receive a wireless signal having a data packet with a payload comprising a plurality of different power levels and to generate a plurality of RSSI (Receive Signal Strength Indicator) signals having a plurality of peak RSSI levels corresponding to the plurality of different power levels;

a plurality of RSSI peak payload registers, respectively configured to store one of the plurality of peak RSSI levels for a RSSI step of the payload; and

an application controller configured to utilize the plurality of peak RSSI levels stored in the plurality of RSSI peak payload registers to determine if the plurality of different power levels correspond to expected sequence of power level differences.

2. The system of claim 1, further comprising:

one or more RSSI start registers configured to store a starting position of one or more RSSI steps; and

one or more RSSI stop registers configured to store a stopping position of the one or more RSSI steps.

3. The system of claim 1, further comprising:

a result bit register configured to store a result bit having a value that indicates whether the power levels of the payload correspond to the expected sequence of power levels; and

a processing unit configured to set the value of the result bit based upon the plurality of peak RSSI levels,

wherein the application controller is configured to query the result bit register and to evaluate an authenticity of the payload.

4. The system of claim 3,

wherein the application controller is configured to operate in a sleep mode that consumes a first amount of power during receipt of the payload;

and

wherein the application controller is configured to operate in a normal operating mode that consumes a second amount of power, greater than the first amount of power, after the entirety of the payload has been received.

5. The system of claim 3, further comprising:

a difference calculation element configured to calculate one or more RSSI differences between the plurality of peak RSSI levels stored in the plurality of RSSI peak payload registers; and

a RSSI difference register configured to store the one or more RSSI differences.

6. The system of claim 5, further comprising:

a RSSI expected value register configured to store one or more expected RSSI differences between the plurality of peak RSSI levels; and

a comparison element configured to compare the one or more expected RSSI differences to the one or more RSSI differences and to set the value of the result bit based upon the comparison.

7. The system of claim 6,

a tolerance register configured to store one or more tolerance values;

wherein the comparison element is configured to compare the one or more RSSI differences to a sum of the one or more expected RSSI differences and at least one of the one or more tolerance values,

wherein the comparison element is configured to set the value of the result bit based upon the comparison.

8. A passive keyless entry receiver system, comprising:

a receiver configured to receive a wireless signal having a data packet with a payload comprising a plurality of different power levels and to generate an RSSI (Receive Signal Strength Indicator) signal corresponding to a plurality of peak RSSI levels of the plurality of different power levels;

a plurality of RSSI peak payload registers, respectively configured to store one of the plurality of peak RSSI levels for a RSSI step of the payload having a pre-defined bit range;

one or more RSSI start registers configured to store a starting bit position of one or more RSSI steps;

one or more RSSI stop registers configured to store a stopping bit position of the one or more RSSI steps; and

an application controller, which upon receipt of an entirety of the payload is configured to utilize a plurality of peak RSSI levels stored in the plurality of RSSI peak payload registers to determine if power level differences between RSSI steps of the payload correspond to expected sequence of power level differences.

9. The system of claim 8, further comprising:

a result bit register configured to store a result bit having a value that indicates whether the power levels of the payload correspond to the expected sequence of power levels; and

a processing unit configured to set the value of the result bit based upon the plurality of peak RSSI levels,

wherein the application controller is configured to query the result bit register and to evaluate an authenticity of the payload after receipt of the entirety of the payload.

10. The system of claim 9,

wherein the application controller is configured to operate in a sleep mode that consumes a first amount of power during receipt of the payload;

and

wherein the application controller is configured to operate in a normal operating mode that consumes a second amount of power, greater than the first amount of power after the entirety of the payload has been received.

11. The system of claim 9, further comprising:

a difference calculation element configured to calculate one or more RSSI differences between the plurality of peak RSSI levels stored in the plurality of RSSI peak payload registers; and

a RSSI difference register configured to store the one or more RSSI differences.

12. The system of claim 9, further comprising:

a RSSI expected value register configured to store one or more expected RSSI differences between the plurality of peak RSSI levels; and

a comparison element configured to compare the one or more expected RSSI differences to the one or more RSSI differences and to set the value of the result bit based upon the comparison.

13. The system of claim 12, further comprising:

wherein the comparison element is configured to maintain the value of the result bit if the one or more RSSI differences are equivalent to the one or more expected RSSI differences, and

wherein the comparison element is configured to toggle the value of the result bit if the one or more RSSI differences are not equivalent to the one or more expected RSSI differences.

14. The system of claim 12,

a tolerance register configured to store one or more tolerance values;

wherein the comparison element is configured to compare the one or more RSSI differences to a sum of the one or more expected RSSI differences and at least one of the one or more tolerance values,

wherein the comparison element is configured to set the value of the result bit based upon the comparison.

15. The system of claim 8, further comprising:

a processing unit configured to generate an interrupt signal that is provided to the application controller to signal an authenticity of the payload.

16. A method of preventing a relay attack, comprising:

receiving a wireless signal having a data packet with a payload comprising a plurality of different power levels;

determining a plurality of peak RSSI (Receive Signal Strength Indicator) levels within a plurality of pre-defined bit ranges within the payload corresponding to the plurality of different power levels;

storing the plurality of peak RSSI levels in RSSI peak payload registers until an entire payload of the data packet is received; and

utilizing the plurality of peak RSSI levels stored in RSSI peak payload registers to determine if the plurality of different power levels of the payload correspond to an expected sequence of power levels.

17. The method of claim 16, comprising:

selecting a number of RSSI steps for the payload that is equal to a pre-defined number of power level differences within an expected fingerprint of the payload.

18. The method of claim 16, comprising:

setting a value of a result bit based upon the plurality of peak RSSI levels; and

querying the value of the result bit or providing an interrupt signal to determine if the plurality of different power levels of the payload correspond to the expected sequence of power levels.

19. The method of claim 18, further comprising:

calculating one or more RSSI differences between peak RSSI levels of the plurality of pre-defined bit ranges; and

comparing the one or more RSSI differences to expected RSSI differences.

20. The method of claim 19,

wherein if the one or more RSSI differences are within a tolerance of the expected RSSI differences, the result bit is maintained at a first value;

and

wherein if the one or more RSSI differences are not within the tolerance of the expected RSSI differences, the result bit is changed to a second value.