STRING DAC CHARGE BOOST SYSTEM AND METHOD

• US 20140132435A1
• Filed: 03/15/2013
• Published: 05/15/2014
• Est. Priority Date: 11/14/2012
• Status: Active Grant

• Current Assignee: Analog Devices International Unlimited Company (Analog Devices, Inc.)
• Original Assignee: Analog Devices Technology (Analog Devices, Inc.)
• Inventors: DEMPSEY, Dennis A.
• Granted Patent: US 8,912,940 B2
• Time in Patent Office: Days
• US Class Current: 341/154
• CPC Class Codes: H03M 1/0872 by disabling changes in the output during the transitions, e.g. by holding or latching
• CPC Class Codes: H03M 1/682 both converters being of the unary decoded type
• CPC Class Codes: H03M 1/765 using a single level of switches which are controlled by unary decoded digital signals

Abstract

Embodiments of the present invention may provide a string DAC with charge boosting. The string DAC may include multiple strings, such as an MSB DAC and an LSB DAC, for converting a digital word into a corresponding analog voltage. The string DAC may also include a charge boost system to couple a charge into or out of the DAC during a code transition, such as a MSB code transition. The string DAC may operate in a break-before-make connection technique where all relevant connections are substantially open-circuited before new connections are made. Therefore, the charge boost may shorten the settling time of impedance elements in the string DAC between code transitions and may substantially reduce (or eliminate) glitches.

Claims

1. A string digital to analog converter (DAC), comprising:

an impedance network comprising a first and second impedance strings;

a set of switches to couple a first voltage across the first impedance string to the second impedance string in a first code configuration and to couple a second voltage across the first impedance sting to the second impedance string in a second code configuration; and

a charge boost circuit to inject a boost charge into the impedance network during a transition between the first code configuration and the second code configuration.

2. The string DAC of claim 1, wherein a polarity of the boost charge is based on a comparison between first and second set of codes associated with the first and second code configurations respectively.

3. The string DAC of claim 1, wherein the charge boost circuit comprises a charge storage device.

4. The string DAC of claim 3, wherein the charge storage device is a variable capacitor.

5. The string DAC of claim 3, wherein the charge boost circuit further comprises a plurality of switches.

6. The string DAC of claim 5, wherein the plurality of switches includes at least one charging switch to selectively couple the charge storage device to a reference voltage source.

7. The string DAC of claim 5, wherein the plurality of switches includes at least one coupling switch to selectively couple the charge storage device to the impedance network.

8. The string DAC of claim 1, wherein the charge boost circuit comprises two charge boost components, a first component to inject a first charge and a second component to inject a second charge, wherein the second charge is greater than the first charge.

9. The string DAC of claim 8, wherein the charge boost circuit is configured to apply either the first charge or the second charge during the transition based on a comparison of first and second codes associated with the first and second code configurations respectively.

10. The string DAC of claim 1, wherein the charge boost circuit comprises a capacitor DAC.

11. The string DAC of claim 1, wherein the charge boost circuit further comprises an attenuator coupled to the capacitor DAC.

12. The string DAC of claim 1, wherein the charge boost circuit comprises a capacitor divider network.

13. The string DAC of claim 1, wherein the charge boost circuit comprises a parasitic capacitance reduction device.

14. A string digital to analog converter (DAC), comprising:

an impedance network comprising a first and second impedance strings;

a set of switches to couple a first voltage across the first impedance string to the second impedance string in a first code configuration and to couple a second voltage across the first impedance sting to the second impedance string in a second code configuration; and

a charge boost circuit to inject a charge after a transition between the first code configuration and the second code configuration.

15. The string DAC of claim 14, wherein and the charge is injected during the second code configuration.

16. The string DAC of claim 14, wherein the charge boost circuit includes a resistor.

17. The string DAC of claim 14, wherein the charge boost circuit is selectively coupled to a substantial midpoint of the second resistor string.

18. A method of converting two digital signals into respective analog signals, comprising:

converting a first digital signal into a first analog signal using a multi-string DAC;

converting a second digital signal into a second analog signal using the multi-string DAC; and

injecting a boost charge signal into the multi-string DAC during a transition between the first and second digital signal conversions.

19. The method of claim 18, wherein a polarity of the boost charge signal is based on a comparison of the first and second digital signals.

20. The method of claim 18, further comprises injecting a second boost charge signal during a transition between the first and second digital signal conversions.

21. The method of claim 18, further comprises injecting a slow boost charge signal during the conversion of the second digital signal.

22. A string digital to analog converter (DAC), comprising:

a resistive network comprising a first and second resistor strings, each string comprising a plurality of series-coupled resistors;

a switch array selectively connecting intermediate nodes in the first resistor string to terminal ends of the second resistor string, the switch array responsive to input control codes to configure the selective connections between the first and second resistor string; and

a charge boost circuit to inject a charge into the string DAC during a transition between a first control code and a second control code.

23. The string DAC of claim 22, wherein the charge is injected into the resistive network.

24. The string DAC of claim 22, wherein the charge is injected into the switch array.