THREE-DIMENSION IMAGE FORMAT CONVERTER AND THREE-DIMENSION IMAGE FORMAT CONVERSION METHOD THEREOF

• US 20140132716A1
• Filed: 11/06/2013
• Published: 05/15/2014
• Est. Priority Date: 11/13/2012
• Status: Abandoned Application

• Current Assignee: Realtek Semiconductor Corp.
• Original Assignee: Realtek Semiconductor Corp.
• Inventors: LIN, Wen-Chi, TUNG, Hsu-Jung, LIN, Tseng I., CHENG, Chihsiung
• Application Number:
  US14/073,626
• Publication Number:
  US 20140132716A1
• Time in Patent Office: Days
• US Class Current: 348/43
• CPC Class Codes: H04N 13/139 Format conversion, e.g. of frame-rate or size
• CPC Class Codes: H04N 13/161 Encoding, multiplexing or demultiplexing different image signal components for multi-view video sequence encoding H04N19/597
• CPC Class Codes: H04N 13/194 Transmission of image signals

Abstract

A three-dimension (3D) image format converter and a 3D image format conversion method thereof are provided. The 3D image format converter includes a memory, an input circuit, a control circuit, and an output circuit. The input circuit receives a first 3D image signal. The control circuit determines a first permutation way and a second permutation way according to the first 3D image signal belonging to one of a frame transmission mode and a line transmission mode, writes the first three-dimension image signal into the memory in the first permutation way and reads out the first three-dimension image signal from the memory in the second permutation way to generate a second 3D image signal belonging to the other of the frame transmission mode and the line transmission mode. The output circuit outputs the second three-dimension image signal.

Claims

1. A three-dimension (3D) image format converter, comprising:

a memory;

an input circuit, being configured to receive a first 3D image signal carrying a right-eye image data and a left-eye image data;

a control circuit, being coupled to the memory and the input circuit and configured to determine a first permutation way and a second permutation way according to the first 3D image signal belonging to one of a frame transmission mode and a line transmission mode, write the right-eye image data and the left-eye image data into the memory in the first permutation way, and read out the right-eye image data and the left-eye image data from the memory in the second permutation way to generate a second 3D image signal belonging to the other of the frame transmission mode and the line transmission mode; and

an output circuit, being coupled to the control circuit and configured to output the second 3D image signal.

2. The 3D image format converter as claimed in claim 1, wherein the control circuit comprises:

an image write circuit, being coupled to the input circuit and configured to write the right-eye image data and the left-eye image data into the memory in the first permutation way;

an image read-out circuit, being coupled to the output circuit and configured to read out the right-eye image data and the left-eye image data from the memory in the second permutation way to generate the second 3D image signal; and

a memory address control circuit, being coupled to the image write circuit and the image read-out circuit and configured to determine the first permutation way and the second permutation way according to the first 3D image signal belonging to one of the frame transmission mode and the line transmission mode, and control the image write circuit and the image read-out circuit.

3. The 3D image format converter as claimed in claim 2, wherein when the first 3D image signal belongs to the frame transmission mode, the first permutation way makes the image write circuit interleavingly write a plurality of right-eye line data of the right-eye image data and a plurality of left-eye line data of the left-eye image data into the memory, and the second permutation way makes the image read-out circuit interleavingly read out the right-eye line data of the right-eye image data and the left-eye line data of the left-eye image data from the memory.

4. The 3D image format converter as claimed in claim 2, wherein when the first 3D image signal belongs to the line transmission mode, the memory address control circuit divides a plurality of memory addresses of the memory into a first address block and a second address block, the first permutation way makes the image write circuit write a plurality of right-eye line data of the right-eye image data into the first address block and write a plurality of left-eye line data of the left-eye image data into the second address block, and the second permutation way makes the image read-out circuit read out the right-eye image data from the first address block first and then read out the left-eye image data from the second address block.

5. The 3D image format converter as claimed in claim 2, wherein when the first 3D image signal belongs to the frame transmission mode, the memory address control circuit divides a plurality of memory addresses of the memory into a first address block and a second address block, the first permutation way makes the image write circuit write the right-eye image data into the first address block and write the left-eye image data into the second address block, and the second permutation way makes the image read-out circuit interleavingly read out a plurality of right-eye line data of the right-eye image data and a plurality of left-eye line data of the left-eye image data from the first address block and the second address block.

6. The 3D image format converter as claimed in claim 2, wherein when the first 3D image signal belongs to the line transmission mode, the first permutation way makes the image write circuit interleavingly write a plurality of right-eye line data of the right-eye image data and a plurality of left-eye line data of the left-eye image data into the memory, and the second permutation way makes the image read-out circuit read out the right-eye line data of the right-eye image data and then read out the left-eye line data of the left-eye image data.

7. The 3D image format converter as claimed in claim 2, further comprising a processing circuit coupled to the input circuit and the memory address control circuit, wherein the processing circuit is configured to retrieve a piece of image information of the first 3D image signal to determine that the first 3D image signal belongs to one of the frame transmission mode and the line transmission mode according to the image information, and to transmit a determination result to the memory address control circuit, and the memory address control circuit determines the first permutation way and the second permutation way according to the determination result.

8. The 3D image format converter as claimed in claim 7, wherein the processing circuit determines that the first 3D image signal belongs to the frame transmission mode according to the first 3D image signal belonging to one of a frame sequential format, a frame packing format, a top-and-bottom format and a field alternative format, and determines that the first 3D image signal belongs to the line transmission mode according to the first 3D image signal belonging to one of a side by side format and a line alternative format.

9. A three-dimension (3D) image format conversion method for a 3D image format converter, the 3D image format converter comprising a memory, an input circuit, a control circuit and an output circuit, the control circuit being coupled to the memory, the input circuit and the output circuit, the 3D image format conversion method comprising the following steps:

(a) enabling the input circuit to receive a first 3D image signal carrying a right-eye image data and a left-eye image data;

(b) enabling the control circuit to determine a first permutation way and a second permutation way according to the first 3D image signal belonging to one of a frame transmission mode and a line transmission mode;

(c) enabling the control circuit to write the right-eye image data and the left-eye image data into the memory in the first permutation way;

(d) enabling the control circuit to read out the right-eye image data and the left-eye image data from the memory in the second permutation way to generate a second 3D image signal belonging to the other of the frame transmission mode and the line transmission mode; and

(e) enabling the output circuit to output the second 3D image signal.

10. The 3D image format conversion method as claimed in claim 9, wherein the control circuit comprises an image write circuit, an image read-out circuit and a memory address control circuit, the image write circuit is coupled to the input circuit, the image read-out circuit is coupled to the output circuit, the memory address control circuit is coupled to the image write circuit and the image read-out circuit and configured to control the image write circuit and the image read-out circuit, the step (b) is to enable the memory address control circuit to determine the first permutation way and the second permutation way according to the first 3D image signal belonging to one of the frame transmission mode and the line transmission mode, the step (c) is to enable the image write circuit to write the right-eye image data and the left-eye image data into the memory in the first permutation way, and the step (d) is to enable the image read-out circuit to read out the right-eye image data and the left-eye image data from the memory in the second permutation way to generate the second 3D image signal.

11. The 3D image format conversion method as claimed in claim 10, wherein when the first 3D image signal belongs to the frame transmission mode, the first permutation way makes the image write circuit interleavingly write a plurality of right-eye line data of the right-eye image data and a plurality of left-eye line data of the left-eye image data into the memory, and the second permutation way makes the image read-out circuit interleavingly read out the right-eye line data of the right-eye image data and the left-eye line data of the left-eye image data from the memory.

12. The 3D image format conversion method as claimed in claim 10, wherein when the first 3D image signal belongs to the line transmission mode, the memory address control circuit divides a plurality of memory addresses of the memory into a first address block and a second address block, the first permutation way makes the image write circuit write a plurality of right-eye line data of the right-eye image data into the first address block and write a plurality of left-eye line data of the left-eye image data into the second address block, and the second permutation way makes the image read-out circuit read out the right-eye image data from the first address block and then read out the left-eye image data from the second address block.

13. The 3D image format conversion method as claimed in claim 10, wherein when the first 3D image signal belongs to the frame transmission mode, the memory address control circuit divides a plurality of memory addresses of the memory into a first address block and a second address block, the first permutation way makes the image write circuit write the right-eye image data into the first address block and write the left-eye image data into the second address block, and the second permutation way makes the image read-out circuit interleavingly read out a plurality of right-eye line data of the right-eye image data and a plurality of left-eye line data of the left-eye image data from the first address block and the second address block.

14. The 3D image format conversion method as claimed in claim 10, wherein when the first 3D image signal belongs to the line transmission mode, the first permutation way makes the image write circuit interleavingly write a plurality of right-eye line data of the right-eye image data and a plurality of left-eye line data of the left-eye image data into the memory, and the second permutation way makes the image read-out circuit read out the right-eye line data of the right-eye image data and then read out the left-eye line data of the left-eye image data.

15. The 3D image format conversion method as claimed in claim 10, wherein the 3D image format converter further comprises a processing circuit coupled to the input circuit and the memory address control circuit, and the 3D image format conversion method further comprises the following steps before the step (b):

(f1) enabling the processing circuit to retrieve a piece of image information of the first 3D image signal;

(f2) enabling the processing circuit to determine that the first 3D image signal belongs to one of the frame transmission mode and the line transmission mode according to the image information; and

(f3) enabling the processing circuit to transmit a determination result to the memory address control circuit;

wherein the step (b) is to enable the memory address control circuit to determine the first permutation way and the second permutation way according to the determination result.

16. The 3D image format conversion method as claimed in claim 15, wherein the step (f2) is to enable the processing circuit to determine that the first 3D image signal belongs to the frame transmission mode according to the first 3D image signal belonging to one of a frame sequential format, a frame packing format, a top-and-bottom format and a field alternative format, and to determine that the first 3D image signal belongs to the line transmission mode according to the first 3D image signal belonging to one of a side by side format and a line alternative format.