METHODS AND DEVICES FOR AVOIDING LOWER PAGE CORRUPTION IN DATA STORAGE DEVICES

• US 20140133220A1
• Filed: 11/13/2012
• Published: 05/15/2014
• Est. Priority Date: 11/13/2012
• Status: Active Grant

• Current Assignee: Sandisk Technologies Incorporated (Western Digital Corporation)
• Original Assignee: Western Digital Technologies Incorporated (Western Digital Corporation)
• Inventors: DANILAK, RADOSLAV, MULLENDORE, RODNEY N., TOMLIN, ANDREW J., JONES, JUSTIN, YANG, JUI-YAO
• Granted Patent: US 9,177,638 B2
• Time in Patent Office: Days
• US Class Current: 365/158
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7203 Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
• CPC Class Codes: G11C 11/005 comprising combined but independently operative RAM-ROM, RAM-PROM, RAM-EPROM cells
• CPC Class Codes: G11C 11/16 using elements in which the storage effect is based on magnetic spin effect
• CPC Class Codes: G11C 11/5628 Programming or writing circuits; Data input circuits
• CPC Class Codes: G11C 5/005 Circuit means for protection against loss of information of semiconductor storage devices

Abstract

A data storage device may comprise a plurality of Multi-Level Cell (MLC) non-volatile memory devices comprising a plurality of lower pages and a corresponding plurality of higher-order pages. A controller may be configured to write data to and read data from the plurality of lower pages and the corresponding plurality of higher-order pages. A buffer may be coupled to the controller, which may be configured to accumulate data to be written to the MLC non-volatile memory devices, allocate space in the buffer and write the accumulated data to the allocated space. At least a portion of the accumulated data may be written in a lower page of the MLC non-volatile memory devices and the space in the buffer that stores data written to the lower page may be de-allocated when all higher-order pages corresponding to the lower page have been written in the MLC non-volatile memory devices.

Claims

1. A data storage device, comprising:

a plurality of Multi-Level Cell (MLC) non-volatile memory devices comprising a plurality of lower pages and a corresponding plurality of higher-order pages;

a controller coupled to the plurality of MLC non-volatile memory devices and configured to write data to and read data from the plurality of lower pages and the corresponding plurality of higher-order pages; and

a buffer coupled to the controller;

wherein the controller is configured to;

accumulate data to be written to the MLC non-volatile memory devices;

allocate space in the buffer and write the accumulated data to the allocated space in the buffer;

write at least a portion of the accumulated data in a lower page of the MLC non-volatile memory devices; and

de-allocate space in the buffer that stores data written to the lower page when all higher-order pages corresponding to the lower page have been written in the MLC non-volatile memory devices.

2. The data storage device of claim 1, wherein the buffer comprises non-volatile memory.

3. The data storage device of claim 2, wherein the non-volatile memory comprises Magnetic Random Access Memory (MRAM).

4. The data storage device of claim 1, wherein the controller is further configured to read data from the buffer and write at least a portion of the read data to the MLC non-volatile memory devices, after power is restored to the data storage device after a loss of power.

5. The data storage device of claim 1, wherein the buffer is at least sufficiently large to enable recovery from lower page corruption after a power loss to the data storage device.

6. The data storage device of claim 1, wherein the MLC non-volatile devices are configured to operate in lower page only mode or in Single Level Cell (SLC) mode.

7. The data storage device of claim 1, wherein the controller is further configured to generate and send a write acknowledgement to a host after the accumulated data is written to the allocated space in the buffer.

8. The data storage device of claim 1, wherein the MLC non-volatile memory devices comprise a plurality of blocks, each of the plurality of blocks comprising a plurality of physical pages, a collection of blocks defining a superblock (S-Block), a collection of physical pages with one physical page per block in an S-Block defining a superpage (S-Page), and wherein the data is accumulated, written and stored in units of S-Pages.

9. The data storage device of claim 1, further comprising a backup source of power and a non-volatile memory, wherein the buffer comprises volatile memory and wherein the backup source of power is configured to power at least a portion of the data storage device at least as long as necessary for the controller to write the data from the buffer to the non-volatile memory.

10. The data storage device of claim 9, wherein the non-volatile memory comprises Magnetic Random Access Memory (MRAM).

11. The data storage device of claim 9, wherein the controller is further configured to write at least a portion of the data in the non-volatile memory to the MLC non-volatile memory devices, after power is restored to the data storage device after a loss of power.

12. The data storage device of claim 1, further comprising a write store and wherein the controller is further configured to write the accumulated data to the write store as the accumulated data is written to the allocated space in the buffer.

13. The data storage device of claim 1, wherein controller is further configured to also de-allocate space in the buffer that stores data written to the higher-order pages when all higher-order pages corresponding to the lower page have been written in the MLC non-volatile memory devices.

14. A data storage device controller, comprising:

a processor configured to couple to a buffer and to a plurality of Multi-Level Cell (MLC) non-volatile memory devices that comprise a plurality of lower pages and a corresponding plurality of higher-order pages, the processor being further configured to;

read data from the plurality of lower pages and the corresponding plurality of higher-order pages; and

write data to the plurality of lower pages and the corresponding plurality of higher-order pages by at least;

accumulating data to be written to the MLC non-volatile memory devices;

allocating space in the buffer and writing the accumulated data to the allocated space in the buffer;

writing at least a portion of the accumulated data in a lower page of the MLC non-volatile memory devices; and

de-allocating space in the buffer that stores data written to the lower page when all higher-order pages corresponding to the lower page have been written in the MLC non-volatile memory devices.

15. The data storage device controller of claim 14, wherein the buffer comprises non-volatile memory.

16. The data storage device controller of claim 15, wherein the non-volatile memory comprises Magnetic Random Access Memory (MRAM).

17. The data storage device controller of claim 14, wherein the processor is further configured to read data from the buffer and write at least a portion of the read data to the MLC non-volatile memory devices, after power is restored to the data storage device after a loss of power.

18. The data storage device controller of claim 14, wherein the buffer is at least sufficiently large to enable recovery from lower page corruption after a power loss to the data storage device.

19. The data storage device controller of claim 14, wherein the MLC non-volatile devices are configured to operate in lower page only mode or in Single Level Cell (SLC) mode.

20. The data storage device controller of claim 14, wherein the processor is further configured to generate and send a write acknowledgement to a host after the accumulated data is written to the allocated space in the buffer.

21. The data storage device controller of claim 14, wherein the MLC non-volatile memory devices comprise a plurality of blocks, each of the plurality of blocks comprising a plurality of physical pages, a collection of blocks defining a superblock (S-Block), a collection of physical pages with one physical page per block in an S-Block defining a superpage (S-Page), and wherein the data is accumulated, written and stored in units of S-Pages.

22. The data storage device controller of claim 14, further comprising a backup source of power and a non-volatile memory, wherein the buffer comprises volatile memory and wherein the backup source of power is configured to power at least a portion of the data storage device at least as long as necessary for the controller to write the data from the buffer to the non-volatile memory.

23. The data storage device controller of claim 22, wherein the non-volatile memory comprises Magnetic Random Access Memory (MRAM).

24. The data storage device controller of claim 22, wherein the processor is further configured to write at least a portion of the data in the non-volatile memory to the MLC non-volatile memory devices, after power is restored to the data storage device after a loss of power.

25. The data storage device controller of claim 14, further comprising a write store and wherein the processor is further configured to write the accumulated data to the write store as the accumulated data is written to the allocated space in the buffer.

26. The data storage device controller of claim 14, wherein processor is further configured to also de-allocate space in the buffer that stores data written to the higher-order pages when all higher-order pages corresponding to the lower page have been written in the MLC non-volatile memory devices.

27. A method of controlling a data storage device, the data storage device comprising a buffer and a plurality of Multi-Level Cell (MLC) non-volatile memory devices that comprise a plurality of lower pages and a corresponding plurality of higher-order pages, the method comprising:

reading data from the plurality of lower pages and the corresponding plurality of higher-order pages; and

writing data to the plurality of lower pages and the corresponding plurality of higher-order pages by at least;

accumulating data to be written to the MLC non-volatile memory devices;

allocating space in the buffer and writing the accumulated data to the allocated space in the buffer;

writing at least a portion of the accumulated data in a lower page of the MLC non-volatile memory devices; and

de-allocating space in the buffer that stores data written to the lower page when all higher-order pages corresponding to the lower page have been written in the MLC non-volatile memory devices.

28. The method of claim 27, wherein the buffer comprises non-volatile memory.

29. The method of claim 28, wherein the non-volatile memory comprises Magnetic Random Access Memory (MRAM).

30. The method of claim 27, further comprising reading data from the buffer and writing at least a portion of the read data to the MLC non-volatile memory devices, after power is restored to the data storage device after a loss of power.

31. The method of claim 27, wherein the buffer is at least sufficiently large to enable recovery from lower page corruption after a power loss to the data storage device.

32. The method of claim 27, wherein the MLC non-volatile devices are configured to operate in lower page only mode or in Single Level Cell (SLC) mode.

33. The method of claim 27, further comprising generating and sending a write acknowledgement to a host after the accumulated data is written to the allocated space in the buffer.

34. The method of claim 27, wherein the MLC non-volatile memory devices comprise a plurality of blocks, each of the plurality of blocks comprising a plurality of physical pages, a collection of blocks defining a superblock (S-Block), a collection of physical pages with one physical page per block in an S-Block defining a superpage (S-Page), and accumulating, writing and storing is carried out in units of S-Pages.

35. The method of claim 27, further comprising a backup source of power and a non-volatile memory, wherein the buffer comprises volatile memory and wherein the method further comprises the backup source of power powering at least a portion of the data storage device at least as long as necessary for the controller to write the data from the buffer to the non-volatile memory.

36. The method of claim 35, wherein the non-volatile memory comprises Magnetic Random Access Memory (MRAM).

37. The method of claim 35, further comprising writing at least a portion of the data in the non-volatile memory to the MLC non-volatile memory devices, after power is restored to the data storage device after a loss of power.

38. The method of claim 27, wherein the data storage device further comprises a write store and wherein writing data further comprises writing the accumulated data to the write store as the accumulated data is written to the allocated space in the buffer.

39. The method of claim 27, further comprising de-allocating space in the buffer that stores data written to the higher-order pages when all higher-order pages corresponding to the lower page have been written in the MLC non-volatile memory devices.