CAM NAND with OR Function and Full Chip Search Capability
First Claim
1. A memory circuit comprising:
- an array of non-volatile memory cells arranged along a plurality of word lines and a plurality of M bit lines into a NAND type of architecture, the array formed of multiple blocks, each of the blocks including a plurality of M NAND strings connected along a corresponding one of the M bit lines and each having a plurality of N memory cells connected in series with a plurality of N word lines spanning the M NAND strings, each of the N word lines connected to a corresponding one of the N memory cells thereof;
word line driving circuitry connectable to the word lines, whereby one or more word lines in a plurality of blocks can be concurrently and individually be set to one of a plurality of data dependent read values corresponding to a respective data pattern for each of the plurality of blocks; and
sensing circuitry connectable to the M bit lines individually determine those of the M bit lines where at least one of the NAND strings connected therealong are conducting in response the word line driving circuitry applying said respective data patterns to the corresponding plurality of blocks.
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Abstract
Various techniques for extending the capabilities of CAM NAND type memories are discussed. Multi-block or even full chip search operations can be performed. In addition to the inherent AND property of NAND strings, the memory array has an inherent OR property between NAND string from different blocks along the same bit line that can be exploited through multi-block CAM-type operations. To reduce data-dependent word line to word line effects, in multiple data dependent sensing operations, the sensing can be broken up into sub-operations that avoid data dependent values on adjacent word lines. To improve data protection, subsequent to writing a memory block with indices, the word lines are read back and compared bit-by-bit with their intended values and the results are accumulated to determine whether any of indices include error. A bloom filter can also be used as an initial check during data search operations in order to provide increased data protection.
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Citations
23 Claims
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1. A memory circuit comprising:
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an array of non-volatile memory cells arranged along a plurality of word lines and a plurality of M bit lines into a NAND type of architecture, the array formed of multiple blocks, each of the blocks including a plurality of M NAND strings connected along a corresponding one of the M bit lines and each having a plurality of N memory cells connected in series with a plurality of N word lines spanning the M NAND strings, each of the N word lines connected to a corresponding one of the N memory cells thereof; word line driving circuitry connectable to the word lines, whereby one or more word lines in a plurality of blocks can be concurrently and individually be set to one of a plurality of data dependent read values corresponding to a respective data pattern for each of the plurality of blocks; and sensing circuitry connectable to the M bit lines individually determine those of the M bit lines where at least one of the NAND strings connected therealong are conducting in response the word line driving circuitry applying said respective data patterns to the corresponding plurality of blocks. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method of operating a memory system, the memory system including a memory circuit having an array of non-volatile memory cells arranged into a plurality of blocks, each of the blocks including a first plurality NAND strings and a plurality word lines spanning the NAND strings, each of the word lines connected to a corresponding one of the memory cells thereof, where a first plurality of bit lines span the blocks with each of the blocks having one of the NAND strings thereof connected along a corresponding one of the bit lines, the method comprising:
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receiving for each of a first plurality of the blocks a corresponding first search data pattern from a host device to which the memory system is connected; concurrently biasing one or more word lines of the first plurality of blocks according to the corresponding first search data patterns; and concurrently determining those of the bit lines that conduct in response to the one or more word lines of the first plurality of blocks being concurrently biased according to the first corresponding first data search patterns. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
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Specification