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MACHINE TO MACHINE DEVELOPMENT ENVIRONMENT

  • US 20140136735A1
  • Filed: 11/13/2012
  • Published: 05/15/2014
  • Est. Priority Date: 11/13/2012
  • Status: Active Grant
First Claim
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1. A wireless memory device comprising:

  • logic configured to;

    detect that a first set of data has been written by a microcontroller to a first address of a memory space of the wireless memory device;

    incorporate the first set of data into a first packet, in response to detecting that the first set of data has been written to the memory space, wherein the first packet includes the first address;

    provide the first packet to a wireless chipset to wirelessly transmit the first packet to a destination device;

    receive a second packet from the wireless chipset, wherein the second packet was received wirelessly from the destination device;

    retrieve a second memory address from the second packet;

    retrieve a second set of data from the second packet; and

    write the second set of data to the retrieved second memory address in the memory space of the wireless memory device.

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