Key Value Addressed Storage Drive Using NAND Flash Based Content Addressable Memory
First Claim
1. A memory system comprising:
- a buffer memory section;
a non-volatile memory section connectable to the buffer memory section, including a first array of non-volatile memory cells arranged into a NAND type of architecture, including a plurality NAND strings and a plurality word lines spanning the NAND strings, each of the word lines connected to a corresponding one of the memory cells thereof, wherein the first array is written as pages of data along selected word lines; and
control circuitry connected to the buffer memory section and the non-volatile memory section, wherein the control circuitry can;
store data keys received from a host to which the memory circuit is connected in the buffer memory;
subsequently form the data keys stored in the buffer memory into pages of data such that when written into the non-volatile memory section, the data keys are oriented along NAND strings of the first array; and
transfer the data pages to the non-volatile memory section to be written into the first array.
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Accused Products
Abstract
A NAND Flash based content addressable memory (CAM) is used for a key-value addressed storage drive. The device can use a standard transport protocol such as PCI-E, SAS, SATA, eMMC, SCSI, and so on. A host writes a key-value pair to the drive, where the drive writes the keys along bit lines of a CAM NAND portion of the drive and stores the value in the drive. The drive then maintains a table linking the keys to location of the value. In a read process, the host provides a key to drive, which then broadcasts down the word lines of blocks storing the keys. Based on any matching bit lines, the tables can then be used to retrieve and supply the corresponding data to the host.
23 Citations
20 Claims
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1. A memory system comprising:
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a buffer memory section; a non-volatile memory section connectable to the buffer memory section, including a first array of non-volatile memory cells arranged into a NAND type of architecture, including a plurality NAND strings and a plurality word lines spanning the NAND strings, each of the word lines connected to a corresponding one of the memory cells thereof, wherein the first array is written as pages of data along selected word lines; and control circuitry connected to the buffer memory section and the non-volatile memory section, wherein the control circuitry can;
store data keys received from a host to which the memory circuit is connected in the buffer memory;
subsequently form the data keys stored in the buffer memory into pages of data such that when written into the non-volatile memory section, the data keys are oriented along NAND strings of the first array; and
transfer the data pages to the non-volatile memory section to be written into the first array. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 20)
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18. The non-volatile memory system of claim 18, wherein the accumulation array includes a plurality of N latches, each latch of a size to hold a data key, and each of the received data are stored in one of said latches, and
wherein the bus is N-bits wide and data keys are transferred from the accumulation array to the RAM memory section over the bus N bits at a time by taking one bit per latch.
Specification