TRACKING MEMORY BANK UTILITY AND COST FOR INTELLIGENT SHUTDOWN DECISIONS

• US 20140136870A1
• Filed: 11/14/2012
• Published: 05/15/2014
• Est. Priority Date: 11/14/2012
• Status: Abandoned Application

• Current Assignee: Advanced Micro Devices, Inc.
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: BRETERNITZ, Mauricio, LOH, Gabriel H., O'CONNOR, James M., ECKERT, Yasuko, THOTTETHODI, Mithuna, MANNE, Srilatha, BECKMANN, Bradford M.
• Application Number:
  US13/676,863
• Publication Number:
  US 20140136870A1
• Time in Patent Office: Days
• US Class Current: 713/323
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3225 of memory devices
• CPC Class Codes: G06F 1/3275 Power saving in memory, e.g. RAM, cache
• CPC Class Codes: G06F 1/3287 by switching off individual functional units in the computer system
• CPC Class Codes: G06F 12/0802 Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
• CPC Class Codes: G11C 7/1063 Control signal output circuits, e.g. status or busy flags, feedback command signals
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A device receives an indication that a memory bank is to be powered down, and determines, based on receiving the indication, shutdown scores corresponding to powered up memory banks. Each shutdown score is based on a shutdown metric associated with powering down a powered up memory bank. The device may power down a selected memory bank based on the shutdown scores.

Claims

1. A method, comprising:

receiving, by a processor, an indication that a memory bank is to be powered down;

determining, by the processor and based on receiving the indication, a plurality of shutdown scores corresponding to a plurality of powered up memory banks, each shutdown score, of the plurality of shutdown scores, being based on a shutdown metric associated with powering down a powered up memory bank, of the plurality of powered up memory banks;

powering down, by the processor, a selected memory bank, of the plurality of powered up memory banks, based on the plurality of shutdown scores.

2. The method of claim 1, where receiving the indication is based on at least one of:

receiving an indication of a change to a power state of a component that uses the powered up memory banks;

receiving an indication of a change to an operating voltage of a component that uses the powered up memory banks;

receiving an indication of a change to a memory footprint of a component that uses the powered up memory banks;

or

determining that the shutdown metric satisfies a threshold.

3. The method of claim 1, where the shutdown metric comprises at least one of:

a quantity of blocks, in a particular memory bank of the plurality of powered up memory banks, that store dirty data;

a quantity of blocks, in the particular memory bank, that store non-dirty data;

a quantity of blocks, in the particular memory bank, that store non-native data;

a quantity of blocks, in the particular memory bank, that store native data;

a quantity of blocks, in the particular memory bank, that store dirty data predicted to be written to main memory;

a quantity of blocks, in the particular memory bank, that are unused;

a quantity of blocks, in the particular memory bank, that are used;

a quantity of blocks, in the particular memory bank, predicted to be unused;

a quantity of blocks, in the particular memory bank, predicted to be used;

a quantity of blocks, in the particular memory bank, that store shared information;

a quantity of blocks, in the particular memory bank, that store non-shared information;

a quantity of blocks, in the particular memory bank, that store exclusive information;

a quantity of blocks, in the particular memory bank, that store non-exclusive information;

a quantity of blocks, in the particular memory bank, that store an instruction or read-only information;

a quantity of blocks, in the particular memory bank, that store a non-instruction or non-read-only information;

a quantity of blocks, in the particular memory bank, accessed by central processing unit (CPU) requests;

or

a quantity of blocks, in the particular memory bank, accessed by non-CPU requests.

4. The method of claim 3, where the quantity of blocks comprises an approximate quantity of blocks calculated by flagging a first block and a second block that meet a particular criteria, and where the method further comprises:

determining the quantity of blocks between the first block and the second block.

5. The method of claim 1, where the shutdown metric comprises at least one of:

an amount of time required to power down a particular memory bank of the plurality of powered up memory banks;

an amount of time that a block, in the particular memory bank, has been unused;

an amount of time that a block, in the particular memory bank, has been used;

a quantity of error correction code (ECC) errors reported by the particular memory bank;

an amount of energy or power consumed by the particular memory bank;

an amount of voltage required to operate the particular memory bank;

an access latency of the particular memory bank;

a quantity of accesses to the particular memory bank;

or

a distance between the particular memory bank and another component.

6. The method of claim 1, where each of the plurality of shutdown scores is based on a weighted combination of shutdown metrics.

7. The method of claim 1, where each of the plurality of shutdown scores is based on a difference between a value of the shutdown metric measured before powering down the powered up memory bank, and an estimated value of the shutdown metric after powering down the powered up memory bank

8. A device, comprising:

one or more processors to;

receive an indication that a memory bank is to be powered down;

determine, based on receiving the indication, a plurality of shutdown scores corresponding to a plurality of powered up memory banks, each shutdown score, of the plurality of shutdown scores, being based on a shutdown metric associated with powering down a powered up memory bank, of the plurality of powered up memory banks;

power down a selected memory bank, of the plurality of powered up memory banks, based on the plurality of shutdown scores.

9. The device of claim 8, where the one or more processors, when receiving the indication, are further to at least one of:

receive an indication of a change to a power state of a component that uses the powered up memory banks;

receive an indication of a change to an operating voltage of a component that uses the powered up memory banks;

receive an indication of a change to a memory footprint of a component that uses the powered up memory banks;

or

determine that the shutdown metric satisfies a threshold.

10. The device of claim 8, where the shutdown metric comprises at least one of:

a quantity of blocks, in a particular memory bank of the plurality of powered up memory banks, that store dirty data;

a quantity of blocks, in the particular memory bank, that store non-dirty data;

a quantity of blocks, in the particular memory bank, that store non-native data;

a quantity of blocks, in the particular memory bank, that store native data;

a quantity of blocks, in the particular memory bank, that store dirty data predicted to be written to main memory;

a quantity of blocks, in the particular memory bank, that are unused;

a quantity of blocks, in the particular memory bank, that are used;

a quantity of blocks, in the particular memory bank, predicted to be unused;

a quantity of blocks, in the particular memory bank, predicted to be used;

a quantity of blocks, in the particular memory bank, that store shared information;

a quantity of blocks, in the particular memory bank, that store non-shared information;

a quantity of blocks, in the particular memory bank, that store exclusive information;

a quantity of blocks, in the particular memory bank, that store non-exclusive information;

a quantity of blocks, in the particular memory bank, that store an instruction or read-only information;

a quantity of blocks, in the particular memory bank, that store a non-instruction or non-read-only information;

a quantity of blocks, in the particular memory bank, accessed by central processing unit (CPU) requests;

or

a quantity of blocks, in the particular memory bank, accessed by non-CPU requests.

11. The device of claim 10, where the quantity of blocks comprises an approximate quantity of blocks calculated by flagging a first block and a second block that meet a particular criteria, and where the one or more processors are further to:

determine the quantity of blocks between the first block and the second block.

12. The device of claim 8, where the shutdown metric comprises at least one of:

an amount of time required to power down a particular memory bank of the plurality of powered up memory banks;

an amount of time that a block, in the particular memory bank, has been unused;

an amount of time that a block, in the particular memory bank, has been used;

a quantity of error correction code (ECC) errors reported by the particular memory bank;

an amount of energy or power consumed by the particular memory bank;

an amount of voltage required to operate the particular memory bank;

an access latency of the particular memory bank;

a quantity of accesses to the particular memory bank;

or

a distance between the particular memory bank and another component.

13. The device of claim 8, where each of the plurality of shutdown scores is based on a weighted combination of shutdown metrics.

14. The device of claim 8, where each of the plurality of shutdown scores is based on a difference between a value of the shutdown metric measured before powering down the powered up memory bank, and an estimated value of the shutdown metric after powering down the powered up memory bank

15. A computer-readable medium storing instructions, the instructions comprising:

one or more instructions that, when executed by a processor, cause the processor to;

receive an indication that a memory bank is to be powered down;

determine, based on receiving the indication, a plurality of shutdown scores corresponding to a plurality of powered up memory banks, each shutdown score, of the plurality of shutdown scores, being based on a shutdown metric associated with powering down a powered up memory bank, of the plurality of powered up memory banks;

power down a selected memory bank, of the plurality of powered up memory banks, based on the plurality of shutdown scores.

16. The computer-readable medium of claim 15, where the one or more instructions, that cause the processor to receive the indication, further cause the processor to at least one of:

receive an indication of a change to a power state of a component that uses the powered up memory banks;

receive an indication of a change to an operating voltage of a component that uses the powered up memory banks;

receive an indication of a change to a memory footprint of a component that uses the powered up memory banks;

or

determine that the shutdown metric satisfies a threshold.

17. The computer-readable medium of claim 15, where the shutdown metric comprises at least one of:

a quantity of blocks, in a particular memory bank of the plurality of powered up memory banks, that store dirty data;

a quantity of blocks, in the particular memory bank, that store non-dirty data;

a quantity of blocks, in the particular memory bank, that store non-native data;

a quantity of blocks, in the particular memory bank, that store native data;

a quantity of blocks, in the particular memory bank, that store dirty data predicted to be written to main memory;

a quantity of blocks, in the particular memory bank, that are unused;

a quantity of blocks, in the particular memory bank, that are used;

a quantity of blocks, in the particular memory bank, predicted to be unused;

a quantity of blocks, in the particular memory bank, predicted to be used;

a quantity of blocks, in the particular memory bank, that store shared information;

a quantity of blocks, in the particular memory bank, that store non-shared information;

a quantity of blocks, in the particular memory bank, that store exclusive information;

a quantity of blocks, in the particular memory bank, that store non-exclusive information;

a quantity of blocks, in the particular memory bank, that store an instruction or read-only information;

a quantity of blocks, in the particular memory bank, that store a non-instruction or non-read-only information;

a quantity of blocks, in the particular memory bank, accessed by central processing unit (CPU) requests;

or

a quantity of blocks, in the particular memory bank, accessed by non-CPU requests.

18. The computer-readable medium of claim 15, where the shutdown metric comprises at least one of:

an amount of time required to power down a particular memory bank of the plurality of powered up memory banks;

an amount of time that a block, in the particular memory bank, has been unused;

an amount of time that a block, in the particular memory bank, has been used;

a quantity of error correction code (ECC) errors reported by the particular memory bank;

an amount of energy or power consumed by the particular memory bank;

an amount of voltage required to operate the particular memory bank;

an access latency of the particular memory bank;

a quantity of accesses to the particular memory bank;

or

a distance between the particular memory bank and another component.

19. The computer-readable medium of claim 15, where each of the plurality of shutdown scores is based on a weighted combination of shutdown metrics.

20. The computer-readable medium of claim 15, where each of the plurality of shutdown scores is based on a difference between a value of the shutdown metric measured before powering down the powered up memory bank, and an estimated value of the shutdown metric after powering down the powered up memory bank.