WAFER LEVEL PACKAGING BOND

• US 20140138853A1
• Filed: 01/31/2014
• Published: 05/22/2014
• Est. Priority Date: 03/23/2010
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Liu, Martin, Chu, Richard, Huang, H. T., Peng, Jung-Huei, Hsieh, Yuan-Chih, Cheng, Chun-Wen, Tsai, Chia-Shiung, LIn, Hung-Hua, Lan-Lin
• Granted Patent: US 9,293,445 B2
• Time in Patent Office: Days
• US Class Current: 257/777
• CPC Class Codes: B81B 2207/012 the micromechanical device and the control or processing electronics being separate parts in the same package
• CPC Class Codes: B81C 1/00269 Bonding of solid lids or wafers to the substrate
• CPC Class Codes: B81C 2203/0118 Bonding a wafer on the substrate, i.e. where the cap consists of another wafer
• CPC Class Codes: B81C 2203/035 Soldering
• CPC Class Codes: H01L 21/187 by direct bonding
• CPC Class Codes: H01L 25/162 the devices being mounted on two or more different substrates
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A device is described in one embodiment that includes a micro-electro-mechanical systems (MEMS) device disposed on a first substrate and a semiconductor device disposed on a second substrate. A bond electrically connects the MEMS device and the semiconductor device. The bond includes an interface between a first bonding layer including silicon on the first substrate and a second bonding layer including aluminum on the second substrate. The physical interface between the aluminum and silicon (e.g., amorphous silicon) can provide an electrical connection.

Claims

1. A device, comprising:

a micro-electro-mechanical systems (MEMS) device, disposed on a first substrate;

a semiconductor device, disposed on a second substrate; and

a bond electrically connecting the MEMS device and the semiconductor device, wherein the bond includes an interface between a first bonding layer including silicon and a second bonding layer including aluminum.

2. The device of claim 1, further comprising:

a second bond connecting the MEMS device and the semiconductor device, wherein the second bond includes a second interface between the first bonding layer and the second bonding layer and wherein the second bond provides no electrical connection between the MEMS device and the semiconductor device.

3. The device of claim 1, wherein the semiconductor device is a second MEMS device.

4. The device of claim 1, wherein the semiconductor device is an integrated circuit including at least one complementary metal-oxide semiconductor (CMOS) feature.

5. The device of claim 1, wherein the first bonding layer is amorphous silicon.

6. A device, comprising:

a first substrate having a complementary metal oxide semiconductor (CMOS) device and a first layer of amorphous silicon; and

a second substrate having another semiconductor device and a second layer of aluminum, wherein the first layer of amorphous silicon and the second layer of aluminum physically interface in a bond.

7. The device of claim 6, wherein an electrical connection between elements of the first and second substrates is provided by the bond.

8. The device of claim 6, wherein the first layer includes a dopant.

9. The device of claim 6, wherein the another semiconductor device is a micro-electro-mechanical systems (MEMS) device.

10. The device of claim 6, wherein an electrical connection between the first and second substrates is provided by the bond;

wherein the first layer and the second layer have a second physical interface and wherein no electrical connection is provided by the second physical interface.

11. The device of claim 10, wherein the second physical interface provides an edge of a hermetically sealed cavity.

12. The device of claim 10, wherein the second layer of aluminum is part of a multi-layer interconnect (MLI) structure connected to the another semiconductor device.

13. A device, comprising:

a first semiconductor device disposed on a first substrate and a second semiconductor device disposed on a second substrate; and

a bond between the first substrate and the second substrate, wherein the bond includes an interface between a first bonding layer of amorphous silicon on the first substrate and a second bonding layer including aluminum on the second substrate.

14. The device of claim 13, wherein the first and second semiconductor devices are electrically connected by the interface.

15. The device of claim 13, wherein the interface provides an edge of a hermetically sealed cavity.

16. The device of claim 13, wherein the hermetically sealed cavity includes at least a portion of a micro-electro-mechanical systems (MEMS) device.

17. The device of claim 13, wherein the first semiconductor device is a micro-electro-mechanical systems (MEMS) device.

18. The device of claim 17, wherein the second semiconductor device is an integrated circuit device.

19. The device of claim 13, wherein second bonding layer is a layer of a multi-layer interconnect (MLI) structure of the second semiconductor device.

20. The device of claim 13, wherein the first bonding layer is doped with impurities.