CAPACITANCE DISTRIBUTION DETECTION METHOD, CAPACITANCE DISTRIBUTION DETECTION CIRCUIT, TOUCH SENSOR SYSTEM, AND INFORMATION INPUT/OUTPUT DEVICE
First Claim
1. A method of detecting capacitance distribution, to detect a distribution of capacitance of a plurality of capacitors that are each formed on intersections of a plurality of first signal lines with a plurality of second signal lines,the method comprising:
- driving the first signal lines in a first timing, to output from the second signal lines electric charges that correspond to the capacitors;
controlling, in a second timing subsequent to the first timing, a switching of connections of the first signal lines with that of the second signal lines; and
driving the second signal lines in a third timing subsequent to the second timing, to output from the first signal lines the electric charges that correspond to the capacitors.
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Accused Products
Abstract
A capacitance distribution detection circuit (2) includes a multiplexer (4), a driver (5), and a sense amplifier (6), and the multiplexer (4) switches states between a first connection state in which first signal lines (HL1 to HLM) are connected to the driver (5) and second signal lines (VL1 to VLM) are connected to the sense amplifier (6), and a second connection state in which the first signal lines (HL1 to HLM) are connected to the sense amplifier (6) and the second signal lines (VL1 to VLM) are connected to the driver (5).
37 Citations
16 Claims
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1. A method of detecting capacitance distribution, to detect a distribution of capacitance of a plurality of capacitors that are each formed on intersections of a plurality of first signal lines with a plurality of second signal lines,
the method comprising: -
driving the first signal lines in a first timing, to output from the second signal lines electric charges that correspond to the capacitors; controlling, in a second timing subsequent to the first timing, a switching of connections of the first signal lines with that of the second signal lines; and driving the second signal lines in a third timing subsequent to the second timing, to output from the first signal lines the electric charges that correspond to the capacitors. - View Dependent Claims (2)
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3. A capacitance distribution detection circuit that detects a distribution of capacitance of a plurality of capacitors that are each formed on intersections of a plurality of first signal lines with a plurality of second signal lines,
the capacitance distribution detection circuit comprising: -
a multiplexer connected to the plurality of first signal lines and the plurality of second signal lines; a driver connected to the multiplexer; and a sense amplifier connected to the multiplexer; the multiplexer switching a connection state between a first connection state in which the first signal lines are connected to the driver and the second signal lines are connected to the sense amplifier and a second connection state in which the first signal lines are connected to the sense amplifier and the second signal lines are connected to the driver. - View Dependent Claims (6, 8, 9, 10, 11)
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4. A capacitance distribution detection circuit that detects a distribution of capacitance of a plurality of capacitors that are each formed on intersections of a plurality of first signal lines with a plurality of second signal lines,
the capacitance distribution detection circuit comprising: -
a first multiplexer connected to the first signal lines; a first driver connected to the first multiplexer; a first sense amplifier connected to the first multiplexer; a second multiplexer connected to the second signal lines; a second driver connected to the second multiplexer; a second sense amplifier connected to the second multiplexer; and a control circuit that controls the first multiplexer and the second multiplexer so that a connection state is switchable between a first connection state in which the first signal lines are connected to the first driver and the second signal lines are connected to the second sense amplifier, and a second connection state in which the first signal lines are connected to the first sense amplifier and the second signal lines are connected to the second driver. - View Dependent Claims (12, 13, 14, 15, 16)
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5. (canceled)
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7. (canceled)
Specification