×

DEBUGGING IN A SEMICONDUCTOR DEVICE TEST ENVIRONMENT

  • US 20140143600A1
  • Filed: 11/19/2012
  • Published: 05/22/2014
  • Est. Priority Date: 11/19/2012
  • Status: Active Grant
First Claim
Patent Images

1. At least one computer-readable storage medium comprising computer-executable instructions that, when executed on at least one processor of a computing device, implement a debug method comprising:

  • interactively receive debug inputs from a user of the computing device;

    access a test program, the test program comprising a plurality of test program commands;

    generate instrument commands configured to control instruments of a tester to stimulate a device under test (DUT) and receive responses from the DUT in accordance with the debug inputs and the test program commands; and

    apply the instrument commands to instruments in the tester.

View all claims
  • 4 Assignments
Timeline View
Assignment View
    ×
    ×