COHERENT PROXY FOR ATTACHED PROCESSOR

• US 20140149689A1
• Filed: 02/26/2013
• Published: 05/29/2014
• Est. Priority Date: 11/27/2012
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: STARKE, WILLIAM J., STUECHELI, JEFF A., BLANER, BARTHOLOMEW, MARINO, CHARLES, SIEGEL, MICHAEL S.
• Granted Patent: US 9,086,975 B2
• Time in Patent Office: Days
• US Class Current: 711/146
• CPC Class Codes: G06F 12/0822 Copy directories local copy tags for implementing a bus snooping protocol G06F12/0831
• CPC Class Codes: G06F 12/0831 using a bus scheme, e.g. with bus monitoring or watching means
• CPC Class Codes: G06F 2212/622 State-only directory, i.e. not recording identity of sharing or owning nodes

Abstract

A coherent attached processor proxy (CAPP) of a primary coherent system receives a memory access request from an attached processor (AP) and an expected coherence state of a target address of the memory access request with respect to a cache memory of the AP. In response, the CAPP determines a coherence state of the target address and whether or not the expected state matches the determined coherence state. In response to determining that the expected state matches the determined coherence state, the CAPP issues a memory access request corresponding to that received from the AP on a system fabric of the primary coherent system. In response to determining that the expected state does not match the coherence state determined by the CAPP, the CAPP transmits a failure message to the AP without issuing on the system fabric a memory access request corresponding to that received from the AP.

Claims

1. A method of data processing, comprising:

receiving a memory access request from an attached processor (AP) at a coherent attached processor proxy (CAPP) of a primary coherent system, wherein the CAPP includes a CAPP directory of contents of a cache memory in the AP that holds copies of memory blocks belonging to a coherent address space of the primary coherent system, and wherein the receiving includes receiving an expected coherence state of a target address of the memory access request with respect to the cache memory of the AP;

in response to receiving the memory access request at the CAPP, the CAPP determining a coherence state of the target address with respect to the CAPP and determining whether or not the expected state matches the coherence state determined by the CAPP;

in response to determining that the expected state matches the coherence state determined by the CAPP, the CAPP issuing a memory access request corresponding to that received from the AP on a system fabric of the primary coherent system; and

in response to determining that the expected state does not match the coherence state determined by the CAPP, the CAPP transmitting a failure message to the AP without issuing on the system fabric a memory access request corresponding to that received from the AP.

2. The method of claim 1, and further comprising:

the CAPP translating a transaction type of the memory access request received from the AP to obtain the memory access request issued by the CAPP on the system fabric.

3. The method of claim 2, wherein:

the translating includes translating the transaction type by reference to a data structure in the CAPP; and

the method further comprises dynamically updating translations within the data structure.

4. The method of claim 1, wherein:

issuing a memory access request includes a master machine within the CAPP issuing the memory access request; and

the method further comprises;

receiving, at the CAPP, a combined response representing a systemwide coherence response to the memory access request issued by the CAPP on the system fabric; and

the CAPP translating the combined response into an internal combined response message and presenting the internal combined response message to the master machine.

5. The method of claim 1, wherein:

the CAPP includes one or more master machines and one or more snoop machines;

the method further includes;

allocating, from among the one or more master machines, a master machine in a Parked state to service the memory access request;

while the master machine is in the Parked state, preventing at least one of the one or more snoop machines from transitioning to an active state to service a snooped memory access request that conflicts with the target address;

the CAPP determining the coherence state of the target address indicated by the CAPP directory; and

the CAPP transmitting a failure message includes the CAPP transmitting the failure message in response to a determination that the coherence state indicated by the CAPP directory does not match the expected state.

6. The method of claim 1, wherein:

the CAPP includes one or more snoop machines; and

the CAPP determining a coherence state of the target address includes the CAPP determining the coherence state of the target address with respect to the CAPP utilizing prioritization of multiple different sources of coherence information, wherein the multiple different sources of coherence information include at least the CAPP directory and the one or more snoop machines.

7. The method of claim 1, and further comprising:

in response to the CAPP snooping a memory access request, repetitively transmitting an invalidation message to the cache memory in the AP until a handshake message is received by the CAPP from the AP.

8. The method of claim 1, and further comprising:

in response to the CAPP receiving a combined response representing a systemwide coherence response to the memory access request issued by the CAPP on the system fabric, updating the CAPP directory and asynchronously updating the AP directory.