Contact Plugs in SRAM Cells and the Method of Forming the Same
First Claim
1. A method comprising:
- forming a dielectric layer over a portion of a Static Random Access Memory (SRAM) cell, wherein the SRAM cell comprises;
a first pull-up transistor and a second pull-up transistor;
a first pull-down transistor and a second pull-down transistor forming cross-latched inverters with the first pull-up transistor and the second pull-up transistor; and
a first pass-gate transistor and a second pass-gate transistor connected to drains of the first pull-up transistor and the first pull-down transistor and drains of the second pull-up transistor and the second pull-down transistor, respectively;
forming and patterning a first mask layer over the dielectric layer, wherein the forming and the patterning of the first mask layer includes;
patterning a photo resist material disposed over the first mask layer; and
etching the first mask layer to transfer a pattern from the patterned photo resist material to the first mask layer;
thereafter, forming a second mask layer over the dielectric layer;
etching the dielectric layer using the first mask layer and the second mask layer in combination as an etching mask, wherein a contact opening is formed in the dielectric layer; and
forming a contact plug in the contact opening.
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Accused Products
Abstract
A method includes forming a dielectric layer over a portion of an SRAM cell. The SRAM cell includes a first pull-up transistor and a second pull-up transistor, a first pull-down transistor and a second pull-down transistor forming cross-latched inverters with the first pull-up transistor and the second pull-up transistor, and a first pass-gate transistor and a second pass-gate transistor connected to drains of the first pull-up transistor and the first pull-down transistor and drains of the second pull-up transistor and the second pull-down transistor, respectively. A first mask layer is formed over the dielectric layer and patterned. A second mask layer is formed over the dielectric layer and patterned. The dielectric layer is etched using the first mask layer and the second mask layer in combination as an etching mask, wherein a contact opening is formed in the dielectric layer. A contact plug is formed in the contact opening.
349 Citations
28 Claims
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1. A method comprising:
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forming a dielectric layer over a portion of a Static Random Access Memory (SRAM) cell, wherein the SRAM cell comprises; a first pull-up transistor and a second pull-up transistor; a first pull-down transistor and a second pull-down transistor forming cross-latched inverters with the first pull-up transistor and the second pull-up transistor; and a first pass-gate transistor and a second pass-gate transistor connected to drains of the first pull-up transistor and the first pull-down transistor and drains of the second pull-up transistor and the second pull-down transistor, respectively; forming and patterning a first mask layer over the dielectric layer, wherein the forming and the patterning of the first mask layer includes; patterning a photo resist material disposed over the first mask layer; and etching the first mask layer to transfer a pattern from the patterned photo resist material to the first mask layer; thereafter, forming a second mask layer over the dielectric layer; etching the dielectric layer using the first mask layer and the second mask layer in combination as an etching mask, wherein a contact opening is formed in the dielectric layer; and forming a contact plug in the contact opening. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method comprising:
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forming a Static Random Access Memory (SRAM) cell comprising a plurality of gate electrodes, and a plurality of active region strips, wherein the plurality of active region strips form transistors with the plurality of gate electrodes; forming an Inter-Layer Dielectric (ILD) over the plurality of gate electrodes and the plurality of active region strips; forming a first mask layer over the ILD, wherein the first hard mask layer covers first portions of the ILD, with second portions of the ILD exposed through openings in the first mask layer, wherein the forming of the first mask layer includes; forming a resist over the first mask layer; patterning the resist; and etching the first mask layer using the patterned resist to form the openings through which the second portions of the ILD are exposed; forming a second mask layer, wherein the second mask layer comprises portions filled into parts of the openings in the first mask layer; etching the ILD using the first mask layer and the second mask layer as an etching mask to form a plurality of contact openings in the ILD; and forming a plurality of contact plugs in the plurality of contact openings. - View Dependent Claims (12, 13, 14, 15, 16)
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17-23. -23. (canceled)
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24. A method comprising:
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receiving a substrate having a circuit device formed thereupon, wherein the circuit device includes; a material layer formed on the substrate; a first masking layer formed on the material layer; and a photoresist formed on the first masking layer; patterning the photoresist; etching the first masking layer to remove a portion of the first masking layer exposed by the patterned photoresist; forming a second masking layer on the substrate and within a cavity formed by the etching of the first masking layer; patterning the second masking layer; and etching the material layer to remove a portion of the material layer exposed by the etched first masking layer and the patterned second masking layer. - View Dependent Claims (25, 26, 27, 28)
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Specification