Semiconductor Device and Method for Evaluating Semiconductor Device

• US 20140152336A1
• Filed: 11/27/2013
• Published: 06/05/2014
• Est. Priority Date: 11/30/2012
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Sasaki, Toshinari, Kanemura, Hiroshi, Hosaka, Yasuharu, Yokoyama, Shuhei, Obonai, Toshimitsu
• Granted Patent: US 9,153,649 B2
• Time in Patent Office: Days
• US Class Current: 324/762.01
• CPC Class Codes: G01R 31/2656 using non-ionising electromagnetic radiation, e.g. optical radiation
• CPC Class Codes: G09G 3/006 Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309
• CPC Class Codes: G09G 3/3225 using an active matrix
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: H01L 27/14678 Contact-type imagers
• CPC Class Codes: H01L 27/14692 Thin film technologies, e.g. amorphous, poly, micro- or nanocrystalline silicon
• CPC Class Codes: H01L 29/22 including, apart from doping materials or other impurities, only AIIBVI compounds
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A semiconductor layer with a low density of trap states is provided. A transistor with stable electrical characteristics is provided. A transistor having high field-effect mobility is provided. A semiconductor device including the transistor is provided. A method for evaluating a semiconductor layer is provided. A method for evaluating a transistor is provided. A method for evaluating a semiconductor device is provided. Provided is, for example, a semiconductor layer with a low defect density which can be used for a channel formation region of a transistor, a transistor including a semiconductor layer with a low defect density in a channel formation region, or a semiconductor device including the transistor.

Claims

1. An evaluation method for a semiconductor device comprising the steps of:

starting to apply a voltage between a first electrode and a second electrode at a time T0 so that a current flows in an oxide semiconductor layer electrically connected to the first electrode and the second electrode;

irradiating the oxide semiconductor layer with light having an energy higher than an energy gap of the oxide semiconductor layer, wherein the irradiating step starts at a time T1 and stops at a time T2;

comparing a value of a current flowing between the first electrode and the second electrode at a time T3 with a maximum value of a current flowing between the first electrode and the second electrode between the time T1 and the time T2; and

comparing a value of a current flowing between the first electrode and the second electrode at a time T4 with the maximum value of the current flowing between the first electrode and the second electrode between the time T1 and the time T2; and

stopping to apply the voltage between the first electrode and the second at time T5,

wherein the time T1 is after the time T0,

wherein the time T3 is after a period of greater than or equal to 1 second and less than or equal to 15 seconds from the time T1 and before the time T2,

wherein the time T4 is after a period of greater than or equal to 1 second and less than or equal to 15 seconds from the time T2, and

wherein the time T5 is after the time T4.

2. The evaluation method for a semiconductor device according to claim 1,

wherein the time T3 is five seconds after the time T1, and

wherein the time T4 is five seconds after the time T2.

3. The evaluation method for a semiconductor device according to claim 1,

wherein the time T2 is after a period of greater than or equal to 100 seconds and less than or equal to 300 seconds from the time T1.

4. The evaluation method for a semiconductor device according to claim 1,

wherein a temperature around the semiconductor device is kept within a range of 20°

C. to 25°

C. from the time T0 until the time T5.

5. The evaluation method for a semiconductor device according to claim 1, further comprising the step of judging whether the value of the current flowing between the first electrode and the second electrode at the time T3 is greater than or equal to 70% and less than 100% of the maximum value of the current flowing between the first electrode and the second electrode between the time T1 and the time T2.

6. The evaluation method for a semiconductor device according to claim 1, further comprising the step of judging whether the value of the current flowing between the first electrode and the second electrode at the time T4 is greater than or equal to 5% and less than 100% of the maximum value of the current flowing between the first electrode and the second electrode between the time T1 and the time T2.

7. The evaluation method for a semiconductor device according to claim 1, further comprising the steps of:

judging whether the value of the current flowing between the first electrode and the second electrode at the time T3 is greater than or equal to 70% and less than 100% of the maximum value of the current flowing between the first electrode and the second electrode between the time T1 and the time T2; and

judging whether the value of the current flowing between the first electrode and the second electrode at the time T4 is greater than or equal to 5% and less than 100% of the maximum value of the current flowing between the first electrode and the second electrode between the time T1 and the time T2.

8. The evaluation method for a semiconductor device according to claim 1,

wherein the light has a peak intensity in a wavelength range of 340 nm to 360 nm.

9. The evaluation method for a semiconductor device according to claim 1,

wherein the light has an intensity of 3 mW/cm².

10. The evaluation method for a semiconductor device according to claim 1,

wherein the oxide semiconductor layer includes a first oxide semiconductor layer and a second oxide semiconductor layer over the first oxide semiconductor layer.

11. A semiconductor device comprising:

a transistor including an oxide semiconductor layer in a channel formation region, the oxide semiconductor layer being electrically connected to a first electrode and a second electrode,

wherein, while a voltage is applied between the first electrode and the second electrode, the oxide semiconductor layer begins to be irradiated with light having a peak intensity in a wavelength range of 340 nm to 360 nm and an intensity of 3 mW/cm² at a temperature of 25°

C. at a time T0 and irradiation is stopped at a time T1,

wherein a value of a current flowing between the first electrode and the second electrode at a time T2 is greater than or equal to 70% and less than 100% of a maximum value of a current flowing between the first electrode and the second electrode between the time T0 and the time T1,

wherein a value of a current flowing between the first electrode and the second electrode at a time T3 is greater than or equal to 5% and less than 100% of the maximum value of the current flowing between the first electrode and the second electrode between the time T0 and the time T1,

wherein the time T2 is after a period of greater than or equal to 1 second and less than or equal to 15 seconds from the time T0 and before the time T1, and

wherein the time T3 is after a period of greater than or equal to 1 second and less than or equal to 15 seconds from the time T1.

12. The semiconductor device according to claim 11,

wherein the time T2 is five seconds after the time T0, and

wherein the time T3 is five seconds after the time T1.

13. The semiconductor device according to claim 11,

wherein the time T1 is after a period of greater than or equal to 100 seconds and less than or equal to 300 seconds from the time T0.

14. The semiconductor device according to claim 11,

wherein the oxide semiconductor layer includes a first oxide semiconductor layer and a second oxide semiconductor layer over the first oxide semiconductor layer, and

wherein the second oxide semiconductor layer has a lower electron affinity than an electron affinity of the first oxide semiconductor layer.

15. The semiconductor device according to claim 11, further comprising an insulating film in contact with the oxide semiconductor layer and a third electrode overlapping with the oxide semiconductor layer with the insulating film interposed therebetween.

16. The semiconductor device according to claim 11,

wherein the oxide semiconductor layer comprises at least indium.

17. An evaluation method for a semiconductor device comprising the steps of:

starting to apply a voltage between a first electrode and a second electrode at a time T0 so that a current flows in an oxide semiconductor layer electrically connected to the first electrode and the second electrode;

irradiating the oxide semiconductor layer with light having an energy higher than an energy gap of the oxide semiconductor layer, wherein the irradiating step starts at a time T1 and stops at a time T2;

comparing a value of a current flowing between the first electrode and the second electrode at a time T3 with a maximum value of a current flowing between the first electrode and the second electrode between the time T1 and the time T2; and

comparing a value of a current flowing between the first electrode and the second electrode at a time T4 with the maximum value of the current flowing between the first electrode and the second electrode between the time T1 and the time T2; and

stopping to apply the voltage between the first electrode and the second at time T5,

wherein the time T1 is after the time T0,

wherein the time T3 is between the time T1 and the time T2,

wherein the time T4 is after a period of greater than or equal to 1 second and less than or equal to 15 seconds from the time T2, and

wherein the time T5 is after the time T4.