ACTIVE MATRIX DISPLAY PANEL WITH GROUND TIE LINES
First Claim
Patent Images
1. A display panel comprising:
- a thin film transistor (TFT) substrate including a pixel area and a non-pixel area, wherein the pixel area includes an array of bank openings and an array of bottom electrodes within the array of bank openings;
a ground line in the non-pixel area; and
an array of ground tie lines running between the bank openings in the pixel area and electrically connected to the ground line in the non-pixel area.
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Abstract
A display panel and a method of forming a display panel are described. The display panel may include a thin film transistor substrate including a pixel area and a non-pixel area. The pixel area includes an array of bank openings and an array of bottom electrodes within the array of bank openings. A ground line is located in the non-pixel area and an array of ground tie lines run between the bank openings in the pixel area and are electrically connected to the ground line in the non-pixel area.
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Citations
29 Claims
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1. A display panel comprising:
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a thin film transistor (TFT) substrate including a pixel area and a non-pixel area, wherein the pixel area includes an array of bank openings and an array of bottom electrodes within the array of bank openings; a ground line in the non-pixel area; and an array of ground tie lines running between the bank openings in the pixel area and electrically connected to the ground line in the non-pixel area. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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20. A method of forming a display panel comprising:
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transferring an array of micro LED devices from a carrier substrate to a backplane that comprises; a thin film transistor (TFT) substrate including a pixel area and a non-pixel area, wherein the pixel area includes an array of bank openings and an array of bottom electrodes within the array of bank openings; a ground line in the non-pixel area; and an array of ground tie lines running between the bank openings in the pixel area and electrically connected to the ground line in the non-pixel area; bonding the array of micro LED devices to the array of bottom electrodes; and forming a top electrode layer in electrical contact with at least one of the micro LED devices and at least one of the ground tie lines. - View Dependent Claims (21, 22, 23, 24, 25, 26, 27, 28, 29)
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Specification