DEEP DEPLETED CHANNEL MOSFET WITH MINIMIZED DOPANT FLUCTUATION AND DIFFUSION LEVELS
First Claim
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1. A device comprising:
- a substrate;
a source and a drain in the substrate, separated by a ground plane layer;
a channel layer over the ground plane layer, the channel layer being formed after all high thermal steps are performed to the device;
a gate electrode over the channel layer; and
a high-k layer on side surfaces of the gate electrode and between the channel layer and the gate electrode.
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Abstract
CMOS devices are fabricated with a channel layer having minimized dopant fluctuation and diffusion. Embodiments include forming a dummy gate, on a substrate, between a pair of spacers, forming, in the substrate, a source and drain separated by a ground plane layer, removing the dummy gate from the substrate, forming a cavity between the pair of spacers, forming, after removal of the dummy gate, a channel layer on the substrate, forming a high-k layer on the channel layer and on side surfaces of the cavity, and forming a replacement gate in the cavity.
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Citations
20 Claims
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1. A device comprising:
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a substrate; a source and a drain in the substrate, separated by a ground plane layer; a channel layer over the ground plane layer, the channel layer being formed after all high thermal steps are performed to the device; a gate electrode over the channel layer; and a high-k layer on side surfaces of the gate electrode and between the channel layer and the gate electrode. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A device comprising:
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a substrate; a source and a drain in the substrate, separated by a ground plane layer; a channel layer epitaxially formed directly on the ground plane layer, the channel layer being formed after all high thermal steps are performed to the device; a gate electrode over the channel layer; and a high-k layer on side surfaces of the gate electrode and between the channel layer and the gate electrode. - View Dependent Claims (10, 11, 12, 13, 14)
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15. A device comprising:
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a substrate; a source and a drain in the substrate, separated by a ground plane layer; a depleted layer on the ground plane, the depleted layer separating the source and drain; a channel layer on the depleted layer, the channel layer being formed after all high thermal steps are performed to the device; a gate electrode over the channel layer; and a high-k layer on side surfaces of the gate electrode and between the channel layer and the gate electrode. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification