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SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME

  • US 20140160846A1
  • Filed: 03/14/2013
  • Published: 06/12/2014
  • Est. Priority Date: 12/11/2012
  • Status: Active Grant
First Claim
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1. A semiconductor memory device comprising:

  • a memory cell array including memory blocks;

    a voltage generator configured to generate a precharge voltage; and

    a read and write circuit coupled to the memory blocks through bit lines, and configured to supply the precharge voltage to the bit line when a selected memory block is accessed,wherein the precharge voltage varies depending on a distance between the read and write circuit and the selected memory block.

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