INTEGRATED CIRCUIT DEVICE INCLUDING A PLURALITY OF INTEGRATED CIRCUITS AND ITS APPLICATION TO PANEL DISPLAY DEVICE
First Claim
1. An integrated circuit device, comprising:
- a first integrated circuit including;
a first power supply circuit;
a timing generation circuit generating a synchronization signal; and
a first power supply control section controlling operation timing of said first power supply circuit;
a second integrated circuit including;
a second power supply circuit; and
a second power supply control section controlling operation timing of said second power supply circuit; and
a power supply line electrically connecting outputs of said first and second power supply circuits,wherein said first and second integrated circuits are adapted to a sleep mode,wherein an operation of said first power supply circuit is stopped when said first integrated circuit is placed into the sleep mode,wherein an operation of said second power supply circuit is stopped when said second integrated circuit is placed into the sleep mode,wherein said synchronization signal is supplied to said first and second power supply control sections,wherein said first power supply control section is configured to start the operation of said first power supply circuit in response to a start of a supply of said synchronization signal after a first sleep-out command to get out of the sleep mode is supplied to said first integrated circuit,wherein said second power supply control section is configured to start the operation of said second power supply circuit in response to a start of a supply of said synchronization signal after a second sleep-out command to get out of the sleep mode is supplied to said second integrated circuit, andwherein said timing generation circuit starts supplying said synchronization signal after a predetermined waiting time elapses after said first sleep-out command is supplied to said first integrated circuit.
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Accused Products
Abstract
An integrated circuit device includes first and second integrated circuits and a power supply line. The first integrated circuit includes a first power supply circuit, a timing generation circuit generating a synchronization signal, and a first power supply control section. The second integrated circuit includes a second power supply circuit and a second power supply control section. The power supply line electrically connects the outputs of the first and second power supply circuit. The first and second power supply control sections are each configured to start the operations of the first and second power supply circuits, respectively, in response to a start of a supply of the synchronization signal after a sleep-out command is supplied thereto. The timing generation circuit starts supplying the synchronization signal after a predetermined waiting time elapses after the sleep-out command is supplied to the first integrated circuit.
34 Citations
10 Claims
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1. An integrated circuit device, comprising:
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a first integrated circuit including; a first power supply circuit; a timing generation circuit generating a synchronization signal; and a first power supply control section controlling operation timing of said first power supply circuit; a second integrated circuit including; a second power supply circuit; and a second power supply control section controlling operation timing of said second power supply circuit; and a power supply line electrically connecting outputs of said first and second power supply circuits, wherein said first and second integrated circuits are adapted to a sleep mode, wherein an operation of said first power supply circuit is stopped when said first integrated circuit is placed into the sleep mode, wherein an operation of said second power supply circuit is stopped when said second integrated circuit is placed into the sleep mode, wherein said synchronization signal is supplied to said first and second power supply control sections, wherein said first power supply control section is configured to start the operation of said first power supply circuit in response to a start of a supply of said synchronization signal after a first sleep-out command to get out of the sleep mode is supplied to said first integrated circuit, wherein said second power supply control section is configured to start the operation of said second power supply circuit in response to a start of a supply of said synchronization signal after a second sleep-out command to get out of the sleep mode is supplied to said second integrated circuit, and wherein said timing generation circuit starts supplying said synchronization signal after a predetermined waiting time elapses after said first sleep-out command is supplied to said first integrated circuit. - View Dependent Claims (2)
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3. An integrated circuit adapted to a sleep mode, comprising:
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a power supply circuit; a timing generation circuit generating a synchronization signal; and a power supply control section controlling operation timing of said power supply circuit, wherein an operation of said power supply circuit is stopped when said integrated circuit is placed into the sleep mode, wherein said power supply control section is configured to start the operation of said power supply circuit in response to a start of a supply of said synchronization signal after a sleep-out command to get out of the sleep mode is supplied to said integrated circuit, and wherein said timing generation circuit starts supplying said synchronization signal after a predetermined waiting time elapses after said sleep-out command is supplied to said integrated circuit. - View Dependent Claims (4)
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5. A panel display device, comprising:
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a display panel; first and second drivers driving said display panel; and a power supply line, wherein said first driver includes; a first power supply circuit; a timing generation circuit generating a vertical synchronization signal; and a first power supply control section controlling operation timing of said first power supply circuit; wherein said second driver includes; a second power supply circuit; and a second power supply control section controlling operation timing of said second power supply circuit; wherein said power supply line electrically connects outputs of said first and second power supply circuits, wherein said first and second drivers are adapted to a sleep mode, wherein an operation of said first power supply circuit is stopped when said first driver is placed into the sleep mode, wherein an operation of said second power supply circuit is stopped when said second driver is placed into the sleep mode, wherein said vertical synchronization signal is supplied to said first and second power supply control sections, wherein said first power supply control section is configured to start the operation of said first power supply circuit in response to a start of a supply of said vertical synchronization signal after a first sleep-out command to get out of the sleep mode is supplied to said first driver, wherein said second power supply control section is configured to start the operation of said second power supply circuit in response to a start of a supply of said vertical synchronization signal after a second sleep-out command to get out of the sleep mode is supplied to said second driver, wherein said timing generation circuit starts supplying said synchronization signal after a predetermined waiting time elapses after said first sleep-out command is supplied to said first driver. - View Dependent Claims (6, 7, 8)
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9. A display panel driver configured to drive a display panel and adapted to a sleep mode, comprising:
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a power supply circuit; a timing generation circuit generating a vertical synchronization signal, and a power supply control section controlling operation timing of said power supply circuit, wherein an operation of said power supply circuit is stopped when said display panel driver is placed into the sleep mode, wherein said vertical synchronization signal is supplied to said power supply control section, wherein said power supply control section is configured to start the operation of said power supply circuit in response to a start of a supply of said vertical synchronization signal after a sleep-out command to get out of the sleep mode is supplied to said display panel driver, wherein said timing generation circuit starts supplying said synchronization signal after a predetermined waiting time elapses after said sleep-out command is supplied to said display panel driver. - View Dependent Claims (10)
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Specification