SYSTEMS AND METHODS FOR INTEGRATING BOOTSTRAP CIRCUIT ELEMENTS IN POWER TRANSISTORS AND OTHER DEVICES

• US 20140167069A1
• Filed: 12/18/2012
• Published: 06/19/2014
• Est. Priority Date: 12/18/2012
• Status: Active Grant

• Current Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Original Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Inventors: Vielemeyer, Martin, Paolucci, Milko, Poelzl, Martin, Leomant, Sylvain
• Granted Patent: US 9,171,738 B2
• Time in Patent Office: Days
• US Class Current: 257/77
• CPC Class Codes: H01L 21/38 Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions
• CPC Class Codes: H01L 21/385 using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
• CPC Class Codes: H01L 21/8234 MIS technology , i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
• CPC Class Codes: H01L 23/64 Impedance arrangements
• CPC Class Codes: H01L 23/642 Capacitive arrangements H01L23/49589, H01L23/645, H01L23/647, H01L23/66 take precedence; capacitive effects between wiring layers on the semiconductor body H01L23/5222
• CPC Class Codes: H01L 23/645 Inductive arrangements H01L23/647, H01L23/66 take precedence
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 27/0676 comprising combinations of diodes, or capacitors or resistors
• CPC Class Codes: H01L 27/0705 comprising components of the field effect type
• CPC Class Codes: H01L 27/0711 in combination with bipolar transistors and diodes, or capacitors, or resistors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H03K 17/6871 the output circuit comprising more than one controlled field-effect transistor

Abstract

Embodiments relate to bootstrap circuits integrated with at least one other device, such as a power transistor or other semiconductor device. In embodiments, the bootstrap circuit can comprise a bootstrap capacitor and a bootstrap diode, or the bootstrap circuit can comprise a bootstrap capacitor and a bootstrap transistor. The bootstrap capacitor comprises a semiconductor-based capacitor, as opposed to an electrolytic, ceramic or other capacitor, in embodiments. The integration of the bootstrap circuit with another circuit or device, such as a power transistor device in one embodiment, is at a silicon-level in embodiments, rather than as a module-like system-in-package of conventional approaches. In other words, the combination of the bootstrap circuit elements and power transistor or other device forms a system-on-silicon, or an integrated circuit, in embodiments, and additionally can be arranged in a single package.

Claims

1. A semiconductor device comprising:

a package; and

an integrated circuit arranged in the package and comprising at least one transistor device and a bootstrap circuit being coupled with one another, the bootstrap circuit comprising a semiconductor-based bootstrap capacitor device.

2. The semiconductor device of claim 1, wherein the at least one transistor device comprises a power transistor device.

3. The semiconductor device of claim 2, wherein the at least one transistor device comprises one of a metal-oxide-semiconductor field effect transistor (MOSFET) device.

4. The semiconductor device of claim 3, wherein the at least one transistor device is part of a floating driver circuit having a high side portion and a low side portion, and wherein the bootstrap circuit is at least partially integrated with one of the high side portion or the low side portion.

5. The semiconductor device of claim 2, wherein the at least one transistor device comprises at least one of gallium nitride (GaN) or silicon carbide (SiC).

6. The semiconductor device of claim 2, wherein the bootstrap circuit is monolithically formed with the at least one transistor device.

7. The semiconductor device of claim 2, wherein the bootstrap capacitor device comprises a trench formed in a silicon substrate, and wherein a first electrode of the bootstrap capacitor device comprises the silicon substrate and a second electrode of the bootstrap capacitor device comprises a conductive material within and separated from the trench by a dielectric layer.

8. The semiconductor device of claim 2, wherein the bootstrap capacitor device comprises a trench formed in a silicon substrate, and wherein a doped well surrounds the trench and forms a first electrode of the bootstrap capacitor device, and a second electrode of the bootstrap capacitor device comprises a conductive material within and separated from the trench by a dielectric layer.

9. The semiconductor device of claim 1, wherein the bootstrap circuit comprises one of a bootstrap diode device or a bootstrap transistor device.

10. The semiconductor device of claim 9, wherein the bootstrap transistor device comprises a MOSFET device.

11. The semiconductor device of claim 9, wherein the bootstrap diode device comprises a Schottky diode device.

12. An integrated circuit comprising:

a semiconductor power transistor; and

a circuit comprising a semiconductor capacitor monolithically formed with the semiconductor power transistor.

13. The integrated circuit of claim 12, wherein the circuit comprises a bootstrap circuit.

14. The integrated circuit of claim 12, further comprising a package in which the semiconductor power transistor and the circuit are disposed.

15. The integrated circuit of claim 12, wherein the semiconductor power transistor comprises one of a metal-oxide-semiconductor field effect transistor (MOSFET), a gallium nitride (GaN) transistor, or a silicon carbide (SiC) transistor.

16. The integrated circuit of claim 12, wherein the semiconductor power transistor and the circuit are monolithically formed in a silicon substrate, wherein at least one trench of the circuit and at least one trench of the semiconductor power transistor have different depths in the silicon substrate, and etching of the at least one trench of the circuit and the at least one trench of the semiconductor power transistor are performed using the same hardmask.

17. The integrated circuit of claim 12, wherein the semiconductor power transistor and the circuit are monolithically formed in a silicon substrate, and wherein an oxide layer is formed on the silicon substrate and a first layer is formed on the oxide layer, and wherein a doping of the first layer diffuses into the silicon substrate.

18. The integrated circuit of claim 17, wherein the first layer comprises at least one of polysilicon or oxide.

19. -26. (canceled)