Method and Apparatus Improving Gate Oxide Reliability by Controlling Accumulated Charge
First Claim
1. A circuit, comprising:
- a) a semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) operating in an accumulated charge regime; and
b) a means for accumulated charge control (ACC) operatively coupled to the SOI MOSFET, wherein the means for ACC comprises a control circuit operatively coupled to a gate of the SOI MOSFET, wherein the control circuit applies a voltage pulse to the gate that switches the SOI MOSFET from the accumulated charge regime to a non-accumulated charge regime for a selected interval.
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Accused Products
Abstract
A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET. The SOI MOSFET is adapted to have a selected average time-to-breakdown, responsive to the first and second determinations, and the circuit is operated using techniques for accumulated charge control operatively coupled to the SOI MOSFET. In one embodiment, the accumulated charge control techniques include using an accumulated charge sink operatively coupled to the SOI MOSFET body.
41 Citations
109 Claims
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1. A circuit, comprising:
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a) a semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) operating in an accumulated charge regime; and b) a means for accumulated charge control (ACC) operatively coupled to the SOI MOSFET, wherein the means for ACC comprises a control circuit operatively coupled to a gate of the SOI MOSFET, wherein the control circuit applies a voltage pulse to the gate that switches the SOI MOSFET from the accumulated charge regime to a non-accumulated charge regime for a selected interval. - View Dependent Claims (2, 3, 4, 5)
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6. A circuit, comprising:
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a) a semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) operating in an accumulated charge regime; and b) a means for accumulated charge control (ACC) operatively coupled to the SOI MOSFET, wherein the means for ACC comprises a resistor electrically connected to a gate of the SOI MOSFET, wherein the resistance value of the resistor is sufficient to prevent attenuation of an induced RF voltage on the gate, and wherein an RF signal voltage having a selected frequency is applied to a drain of the SOI MOSFET thereby generating the induced RF voltage, and wherein the induced RF voltage transitions the SOI MOSFET from the accumulated charge regime to a non-accumulated charge regime for at least part of a cycle of the RF signal voltage. - View Dependent Claims (7, 8, 9, 10)
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11. A method for controlling accumulated charge in a circuit comprising a semiconductor-on-insulator (SOI) metal-oxide-semiconductor field effect transistor (MOSFET) operating in an accumulated charge regime, comprising the steps of:
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a) operatively coupling a control circuit to a gate of the SOI MOSFET; and b) applying a voltage pulse to the gate;
wherein the voltage pulse switches the SOI MOSFET from the accumulated charge regime to a non-accumulated charge regime for a selected interval. - View Dependent Claims (12, 13, 14, 15)
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16. A method for controlling accumulated charge in a circuit comprising a semiconductor-on-insulator (SOI) metal-oxide-semiconductor field effect transistor (MOSFET) operating in an accumulated charge regime, comprising the steps of:
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a) operatively coupling a resistor to a gate of the SOI MOSFET sufficient to prevent attenuation of an induced RF voltage on the gate; and b) applying an RF signal having a selected frequency to a drain of the SOI MOSFET thereby generating the induced RF voltage, wherein the induced RF voltage transitions the SOI MOSFET from the accumulated charge regime to a non-accumulated charge regime for part of a cycle of the RF signal voltage. - View Dependent Claims (17, 18, 19, 20)
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21. A system for controlling accumulated charge in a circuit comprising a semiconductor-on-insulator (SOI) metal-oxide-semiconductor field effect transistor (MOSFET) operating in an accumulated charge regime, comprising:
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a) means for operatively coupling a control circuit to a gate of the SOI MOSFET; and b) means for applying a voltage pulse to the gate that switches the SOI MOSFET from the accumulated charge regime to a non-accumulated charge regime for a selected interval.
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22. A method for substantially preventing accumulated charge from accumulating in an RF switching circuit comprising:
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coupling a first plurality of series connected switching NMOSFETs between a first RF port and a second RF port, each switching NMOSFET of the first plurality of series connected switching NMOSFETs having a gate and a body, wherein at least one switching NMOSFET of the first plurality of series connected switching NMOSFETs has a first accumulated charge sink (ACS) coupled with the body of the at least one switching NMOSFET; coupling a first plurality of series connected shunting NMOSFETs between the first RF port and ground, each shunting NMOSFET of the first plurality of series connected shunting NMOSFETs having a gate and a body, wherein at least one shunting NMOSFET of the first plurality of series connected shunting NMOSFETs has a second accumulated charge sink (ACS) coupled with the body of the at least one shunting NMOSFET of the first plurality of series connected shunting NMOSFETs; applying a first bias voltage to the gates of the first plurality of series connected switching NMOSFETs that is greater than a first threshold voltage, wherein the first plurality of series connected switching NMOSFETs are enabled and a signal path is created between the first RF port and the second RF port; applying a second bias voltage to the gates of the first plurality of series connected shunting NMOSFETs that is less than a second threshold voltage, wherein the first plurality of series connected shunting NMOSFETs are disabled; and applying a third bias voltage to the second ACS of the at least one shunting NMOSFET of the first plurality of series connected shunting NMOSFETs when the first plurality of series connected shunting NMOSFETs are disabled, wherein the third bias voltage is substantially negative with respect to ground and wherein the application of the third bias voltage to the second ACS substantially prevents accumulated charge from accumulating in the body of the at least one shunting NMOSFET of the first plurality of series connected shunting NMOSFETs. - View Dependent Claims (24, 26)
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23. A method for substantially preventing accumulated charge from accumulating in an RF switching circuit comprising:
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coupling a first plurality of series connected switching NMOSFETs between a first RF port and a second RF port, each switching NMOSFET having a gate and a body, wherein at least one switching NMOSFET of the first plurality of series connected switching NMOSFETs has a first accumulated charge sink (ACS) coupled to the body of the at least one switching NMOSFET of the first plurality of series connected switching NMOSFETs; coupling a first plurality of series connected shunting NMOSFETs between the first RF port and ground, each shunting NMOSFET of the first plurality of series connected shunting NMOSFETs having a gate and a body, wherein at least one shunting NMOSFET of the first plurality of series connected shunting NMOSFETs has a second accumulated charge sink (ACS) coupled with the body of the at least one shunting NMOSFET of the first plurality of series connected shunting NMOSFETs; applying a first bias voltage to the gates of the first plurality of series connected switching NMOSFETs that is greater than a first threshold voltage, wherein the first plurality of series connected switching NMOSFETs are enabled and a signal path is created between the first RF port and the second RF port; applying a second bias voltage to the gates of the first plurality of series connected shunting NMOSFETs that is less than a second threshold voltage, wherein the first plurality of series connected shunting NMOSFETs are disabled; and applying a third bias voltage to the second ACS of the at least one shunting NMOSFET of the first plurality of series connected shunting NMOSFETs when the first plurality of series connected shunting NMOSFETs are disabled, wherein the third bias voltage is substantially negative with respect to ground and wherein the application of the third bias voltage to the second ACS substantially prevents accumulated charge from accumulating in the body of the at least one shunting NMOSFET of the first plurality of series connected shunting NMOSFETs, and wherein linearity of an RF signal passed from the first RF port to the second RF port is improved by substantially preventing accumulated charge from accumulating in the body of the at least one shunting NMOSFET of the first plurality of series connected shunting NMOSFETs. - View Dependent Claims (25, 27)
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28. An RF switch, comprising:
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a first RF port; a second RF port; a first switch transistor grouping coupled to the first RF port and to the second RF port and comprising a first plurality of switch NMOSFETs arranged in a stacked configuration; a first shunt transistor grouping coupled to the first RF port and to ground and comprising a first plurality of shunt NMOSFETs arranged in a stacked configuration, wherein at least one of the first plurality of shunt NMOSFETs comprises a first gate, a first source, a first drain, a first body, and a first accumulated charge sink (ACS) coupled to the first body, wherein a first ACS bias voltage is applied to the first ACS, wherein the first ACS is in electrical communication with the first body and is configured so that when the at least one shunt NMOSFET of the first plurality of shunt NMOSFETs is operated in an off-state (non-conducting state), the first ACS bias voltage is substantially negative with respect to ground to substantially prevent accumulated charge from accumulating in the first body of the at least one shunt NMOSFET; and wherein the first switch transistor grouping and the first shunt transistor grouping are fabricated on a silicon-on-insulator substrate. - View Dependent Claims (29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55)
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56. An RF switch, comprising:
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a first RF port; a second RF port; a first switch transistor grouping coupled to the first RF port and to the second RF port and comprising a first plurality of switch NMOSFETs arranged in a stacked configuration; a first shunt transistor grouping coupled to the first RF port and to ground and comprising a first plurality of shunt NMOSFETs arranged in a stacked configuration, wherein at least one of the first plurality of shunt NMOSFETs comprises a first gate, a first source, a first drain, a first body, and a first accumulated charge sink (ACS) coupled to the first body, wherein a first ACS bias voltage is applied to the first ACS, wherein the first ACS is in electrical communication with the first body and is configured so that when the at least one shunt NMOSFET of the first plurality of shunt NMOSFETs is operated in an off-state (non-conducting state), the first ACS bias voltage is substantially more negative than the lesser of a first source bias voltage applied to the first source and a first drain bias voltage applied to the first drain to substantially prevent accumulated charge from accumulating in the first body of the at least one shunt NMOSFET; and wherein the first switch transistor grouping and the first shunt transistor grouping are fabricated on a silicon-on-insulator substrate. - View Dependent Claims (57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83)
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84. An RF switch, comprising:
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a first RF port; a second RF port; a first switch transistor grouping coupled to the first RF port and to the second RF port and comprising a first plurality of switch NMOSFETs arranged in a stacked configuration; a first shunt transistor grouping coupled to the first RF port and to ground and comprising a first plurality of shunt NMOSFETs arranged in a stacked configuration, wherein at least one of the first plurality of shunt NMOSFETs comprises a first gate, a first source, a first drain, a first body, a first accumulated charge sink (ACS) coupled to the first body, wherein the first ACS is positioned proximate a first distal end of the first body and is in electrical communication with the first body, and a second accumulated charge sink (ACS) coupled to the first body, wherein the second ACS is positioned proximate a second distal end of the first body and is in electrical communication with the first body, wherein a first ACS bias voltage is applied to the first ACS and second ACS, wherein, when the at least one shunt NMOSFET of the first plurality of shunt NMOSFETs is configured to operate in an off-state (non-conducting state), the first ACS bias voltage is substantially negative with respect to ground to substantially prevent accumulated charge from accumulating in the first body of the at least one shunt NMOSFET; and wherein the first switch transistor grouping and the first shunt transistor grouping are fabricated on a silicon-on-insulator substrate. - View Dependent Claims (85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96)
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97. An RF switch, comprising:
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a first RF port; a second RF port; a first switch transistor grouping coupled to the first RF port and to the second RF port and comprising a first plurality of switch NMOSFETs arranged in a stacked configuration; a first shunt transistor grouping coupled to the first RF port and to ground and comprising a first plurality of shunt NMOSFETs arranged in a stacked configuration, wherein at least one of the first plurality of shunt NMOSFETs comprises a first gate, a first source, a first drain, a first body, a first accumulated charge sink (ACS) coupled to the first body, wherein the first ACS is positioned proximate a first distal end of the first body and is in electrical communication with the first body, and a second accumulated charge sink (ACS) coupled to the first body, wherein the second ACS is positioned proximate a second distal end of the first body and is in electrical communication with the first body, wherein a first ACS bias voltage is applied to the first ACS and second ACS, wherein, when the at least one shunt NMOSFET of the first plurality of shunt NMOSFETs is configured to operate in an off-state (non-conducting state), the first ACS bias voltage is substantially more negative than the lesser of a first source bias voltage applied to the first source and a first drain bias voltage applied to the first drain to substantially prevent accumulated charge from accumulating in the first body of the at least one shunt NMOSFET; and wherein the first switch transistor grouping and the first shunt transistor grouping are fabricated on a silicon-on-insulator substrate. - View Dependent Claims (98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109)
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Specification