III-Nitride Power Conversion Circuit

• US 20140169052A1
• Filed: 02/20/2014
• Published: 06/19/2014
• Est. Priority Date: 01/11/2008
• Status: Active Grant

• Current Assignee: Infineon Technologies Americas Corp. (Infineon Technologies AG)
• Original Assignee: International Rectifier Corporation (Infineon Technologies AG)
• Inventors: Bahramian, Tony
• Granted Patent: US 9,608,542 B2
• Time in Patent Office: Days
• US Class Current: 363/131
• CPC Class Codes: H02M 1/08 Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
• CPC Class Codes: H02M 3/1584 with a plurality of power processing stages connected in parallel
• CPC Class Codes: H02M 3/1588 comprising at least one synchronous rectifier element H02M3/1582, H02M3/1584 take precedence
• CPC Class Codes: H02M 7/537 using semiconductor devices only, e.g. single switched pulse inverters
• CPC Class Codes: H03K 17/04 Modifications for accelerating switching
• CPC Class Codes: H03K 17/06 Modifications for ensuring a fully conducting state
• CPC Class Codes: H03K 2017/6875 using self-conductive, depletion FETs
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

According to an exemplary embodiment, a III-nitride power conversion circuit includes a gate driver having a plurality of cascaded inverters, each of the plurality of cascaded inverters including at least one III-nitride transistor. At least one of the plurality of cascaded inverters has a cutoff switch and a III-nitride depletion mode load where the cutoff switch is configured to disconnect the III-nitride depletion mode load so as to prevent current from flowing from a supply voltage of the at least one of the plurality of cascaded inverters. The cutoff switch of the at least one of the plurality of cascaded inverters can be driven by one of the plurality of cascaded inverters. The III-nitride power conversion circuit can also include an output driver driven by the gate driver where the output driver has a segmented III-nitride transistor. Furthermore, a selector circuit can be configured to selectively disable at least one segment of the segmented III-nitride transistor.

Claims

1-20. -20. (canceled)

21. A III-nitride power conversion circuit comprising:

a gate driver coupled to a selector circuit.

said selector circuit coupled to a high-side output driver, said high-side output driver comprising a segmented III-nitride transistor;

said selector circuit being configured to selectively disable at least one segment of said segmented III-nitride transistor so as to reduce power consumption in said III-nitride power conversion circuit.

22. The III-nitride power conversion circuit of claim 21, wherein said selector circuit selectively disables said at least one segment in a light load condition.

23. The III-nitride power conversion circuit of claim 21, wherein said selector circuit selectively disables said at least one segment dynamically during operation of said III-nitride power conversion circuit.

24. The III-nitride power conversion circuit of claim 21, wherein said selector circuit selectively disables said at least one segment prior to operation of said III-nitride power conversion circuit.

25. The III-nitride power conversion circuit of claim 21, wherein said segmented III-nitride transistor is a depletion mode transistor.

26. The III-nitride power conversion circuit of claim 21, wherein said gate driver comprises a plurality of cascaded inverters, each of said plurality of cascaded inverters including at least one III-nitride transistor.

27. The III-nitride power conversion circuit of claim 26, wherein each of said plurality of cascaded inverters comprises at least one III-nitride transistor.

28. The III-nitride power conversion circuit of claim 26, wherein at least one of said plurality of cascaded inverters having a cutoff switch and a III-nitride depletion mode load, said cutoff switch being configured to disconnect said III-nitride depletion mode load so as to prevent current from flowing from a supply voltage of said at least one of said plurality of cascaded inverters.

29. The III-nitride power conversion circuit of claim 26, wherein an input transistor of at least one of said plurality of cascaded inverters comprises a III-nitride enhancement mode transistor.

30. The III-nitride power conversion circuit of claim 26, wherein each of said plurality of cascaded inverters comprises a III-nitride depletion mode load.

31. A III-nitride power conversion circuit comprising:

a gate driver coupled to a selector circuit.

said selector circuit coupled to a low-side output driver, said low-side output driver comprising a segmented III-nitride transistor;

said selector circuit being configured to selectively disable at least one segment of said segmented III-nitride transistor so as to reduce power consumption in said III-nitride power conversion circuit.

32. The III-nitride power conversion circuit of claim 31, wherein said selector circuit selectively disables said at least one segment in a light load condition.

33. The III-nitride power conversion circuit of claim 31, wherein said selector circuit selectively disables said at least one segment dynamically during operation of said III-nitride power conversion circuit.

34. The III-nitride power conversion circuit of claim 31, wherein said selector circuit selectively disables said at least one segment prior to operation of said III-nitride power conversion circuit.

35. The III-nitride power conversion circuit of claim 31, wherein said segmented III-nitride transistor is a depletion mode transistor.

36. The III-nitride power conversion circuit of claim 31, wherein said gate driver comprises a plurality of cascaded inverters, each of said plurality of cascaded inverters including at least one III-nitride transistor.

37. The III-nitride power conversion circuit of claim 36, wherein each of said plurality of cascaded inverters comprises at least one III-nitride transistor.

38. The III-nitride power conversion circuit of claim 36, wherein at least one of said plurality of cascaded inverters having a cutoff switch and a III-nitride depletion mode load, said cutoff switch being configured to disconnect said III-nitride depletion mode load so as to prevent current from flowing from a supply voltage of said at least one of said plurality of cascaded inverters.

39. The III-nitride power conversion circuit of claim 36, wherein an input transistor of at least one of said plurality of cascaded inverters comprises a III-nitride enhancement mode transistor.

40. The III-nitride power conversion circuit of claim 36, wherein each of said plurality of cascaded inverters comprises a III-nitride depletion mode load.