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POWER STATE SYNCHRONIZATION IN A MULTI-CORE PROCESSOR

  • US 20140173301A1
  • Filed: 02/04/2014
  • Published: 06/19/2014
  • Est. Priority Date: 12/22/2010
  • Status: Active Grant
First Claim
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1. A multi-core processor comprising:

  • a plurality of physical processing cores; and

    inter-core state discovery microcode in each core enabling the core to participate in a de-centralized inter-core state discovery process through signals, unmediated by any centralized non-core logic, sent to or received from other cores.

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