RESISTOR, DISPLAY DEVICE, AND ELECTRONIC DEVICE

• US 20140175436A1
• Filed: 12/20/2013
• Published: 06/26/2014
• Est. Priority Date: 12/25/2012
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei
• Granted Patent: US 10,229,934 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

To provide a novel resistor. To provide a display device having a novel structure that can improve its reliability. To provide a display device having a novel structure that can reduce electrostatic discharge damages. The resistor includes a semiconductor layer and an insulating layer formed over the semiconductor layer, and the semiconductor layer is an oxide represented by an In-M-Zn oxide that contains at least indium (In), zinc (Zn), and M (M is a metal such as Al, Ga, Ge, Y, Zr, Sn, La, Ce, or Hf) and the insulating layer contains at least hydrogen.

Claims

1. A resistor comprising:

a semiconductor layer; and

an insulating layer over the semiconductor layer,

wherein the semiconductor layer is an oxide comprising indium, zinc, and a metal selected from the group consisting of Al, Ga, Ge, Y, Zr, Sn, La, Ce, and Hf, and

wherein a concentration of hydrogen contained in the insulating layer is 1×

10²² atoms/cm³ or higher.

2. The resistor according to claim 1,

wherein the semiconductor layer comprises a microcrystalline region,

wherein a plurality spots arranged circumferentially are observed in an electron diffraction pattern of the microcrystalline region with a beam diameter of 5 nmφ

or more and 10 nmφ

or less, and

wherein no spots are observed in an electron diffraction pattern of the microcrystalline region with a beam diameter of 300 nmφ

or more.

3. The resistor according to claim 1, further comprising a pair of electrode layers over the semiconductor layer.

4. The resistor according to claim 1, wherein the insulating layer is a silicon nitride film.

5. The resistor according to claim 1, wherein a resistivity of the semiconductor layer is higher than or equal to 1×

10<sup>−

3</sup> Ω

cm and lower than 1×

10⁴ Ω

cm.

6. The resistor according to claim 1, wherein the insulating layer is in contact with the semiconductor layer.

7. A display device comprising:

a pixel portion;

a driver circuit portion outside the pixel portion; and

a protection circuit portion electrically connected to one or both of the pixel portion and the driver circuit portion,

wherein the pixel portion comprises a pixel electrode and a first transistor electrically connected to the pixel electrode,

wherein the driver circuit portion comprises a second transistor configured to control on state or off state of the first transistor,

wherein each of the first transistor and the second transistor comprises a first oxide semiconductor layer in a channel formation region,

wherein the protection circuit portion comprises an insulating layer and a second oxide semiconductor layer formed in the same process where the first oxide semiconductor layer is formed,

wherein a concentration of hydrogen in the first oxide semiconductor layer is different from a concentration of hydrogen in the second oxide semiconductor layer, and

wherein the insulating layer comprises hydrogen.

8. The display device according to claim 7,

wherein the first oxide semiconductor layer and the second oxide semiconductor layer each comprise a microcrystalline region,

wherein a plurality spots arranged circumferentially are observed in an electron diffraction pattern of the microcrystalline region with a beam diameter of 5 nmφ

or more and 10 nmφ

or less, and

wherein no spots are observed in an electron diffraction pattern of the microcrystalline region with a beam diameter of 300 nmφ

or more.

9. The display device according to claim 7, wherein the concentration of hydrogen contained in the second oxide semiconductor layer is higher than the concentration of hydrogen contained in the first oxide semiconductor layer.

10. The display device according to claim 7, wherein a resistivity of the second oxide semiconductor layer is lower than a resistivity of the first oxide semiconductor layer.

11. The display device according to claim 7, wherein a concentration of hydrogen contained in the insulating layer is 1×

10²² atoms/cm³ or higher.

12. The display device according to claim 7, wherein the first oxide semiconductor layer and the second oxide semiconductor layer are each an oxide comprising indium, zinc, and a metal selected from the group consisting of Al, Ga, Ge, Y, Zr, Sn, La, Ce, and Hf.

13. The display device according to claim 7,

wherein the insulating layer is in contact with the second oxide semiconductor layer, and

wherein the insulating layer is not in contact with the first oxide semiconductor layer.

14. An electronic device including the display device according to claim 7.

15. A display device comprising:

a pixel portion; and

a protection circuit portion electrically connected to the pixel portion,

wherein the pixel portion comprises a pixel electrode and a first transistor electrically connected to the pixel electrode,

wherein the first transistor comprises a first oxide semiconductor layer in a channel formation region,

wherein the protection circuit portion comprises an insulating layer and a second oxide semiconductor layer formed in the same process where the first oxide semiconductor layer is formed,

wherein the insulating layer is in contact with the second oxide semiconductor layer,

wherein the insulating layer is not in contact with the first oxide semiconductor layer,

wherein the first oxide semiconductor layer and the second oxide semiconductor layer are each an oxide comprising indium, zinc, and a metal selected from the group consisting of Al, Ga, Ge, Y, Zr, Sn, La, Ce, and Hf, and

wherein the insulating layer comprises hydrogen.

16. The display device according to claim 15,

wherein the first oxide semiconductor layer and the second oxide semiconductor layer each comprise a microcrystalline region,

wherein a plurality spots arranged circumferentially are observed in an electron diffraction pattern of the microcrystalline region with a beam diameter of 5 nmφ

or more and 10 nmφ

or less, and

wherein no spots are observed in an electron diffraction pattern of the microcrystalline region with a beam diameter of 300 nmφ

or more.

17. The display device according to claim 15, wherein a concentration of hydrogen contained in the second oxide semiconductor layer is higher than a concentration of hydrogen contained in the first oxide semiconductor layer.

18. The display device according to claim 15, wherein a resistivity of the second oxide semiconductor layer is lower than a resistivity of the first oxide semiconductor layer.

19. The display device according to claim 15, wherein a concentration of hydrogen contained in the insulating layer is 1×

10²² atoms/cm³ or higher.

20. The display device according to claim 15, wherein the insulating layer is a silicon nitride film.

21. An electronic device including the display device according to claim 15.