SYSTEMS AND METHODS FOR CONTROLLING FREQUENCY SYNTHESIS

• US 20140177770A1
• Filed: 02/26/2014
• Published: 06/26/2014
• Est. Priority Date: 04/26/2012
• Status: Active Grant

• Current Assignee: Skyworks Solutions Incorporated
• Original Assignee: Skyworks Solutions Incorporated
• Inventors: KATUMBA, Rachel Nakabugo, FRENETTE, Darren Roger, NAMDAR-MEHDIABADI, Ardeshir, ROGERS, John William Mitchell
• Granted Patent: US 8,989,332 B2
• Time in Patent Office: Days
• US Class Current: 375/374
• CPC Class Codes: H03L 7/085 concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal H03L7/10 takes precedence; circuits for comparing the phase or frequency of two mutually-independent oscillations H03D13/00
• CPC Class Codes: H03L 7/0891 the up-down pulses controlling source and sink current generators, e.g. a charge pump
• CPC Class Codes: H03L 7/093 using special filtering or amplification characteristics in the loop H03L7/087 - H03L7/091 take precedence
• CPC Class Codes: H03L 7/197 a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division H03L7/1806 takes precedence
• CPC Class Codes: H03L 7/1974 for fractional frequency division
• CPC Class Codes: H03L 7/1978 using a cycle or pulse removing circuit
• CPC Class Codes: H04L 7/04 Speed or phase control by synchronisation signals H04L7/0075 takes precedence

Abstract

Disclosed are systems and method for controlling frequency synthesizers. A control system can be implemented in a phase-locked loop (PLL), such as a Frac-N PLL of a frequency synthesizer, to reduce or eliminate reference spurs. In some embodiments, such a control system can include a phase detector configured to receive a reference signal and a feedback signal. The phase detector can be configured to generate a first signal representative of a phase difference between the reference signal and the feedback signal. The control system can further include a charge pump configured to generate a compensation signal based on the first signal. The control system can further includes an oscillator configured to generate an output signal based on the compensation signal. The compensation signal can be configured to reduce or substantially eliminate one or more reference spurs associated with the frequency synthesizer.

Claims

1. A control system for a frequency synthesizer of a wireless device, the control system comprising:

a phase detector configured to receive a reference signal and a feedback signal, the phase detector further configured to generate a first signal representative of a phase difference between the reference signal and the feedback signal;

a charge pump in communication with the phase detector, the charge pump configured to generate a compensation signal based at least in part on the first signal; and

an oscillator in communication with the charge pump, the oscillator configured to generate an output signal based on the compensation signal, the compensation signal configured to reduce or substantially eliminate one or more spurs associated with the frequency synthesizer.

2. The control system of claim 1 wherein the one or more spurs includes one or more reference spurs.

3. The control system of claim 1 wherein the compensation signal includes a current signal to compensate for the phase difference.

4. The control system of claim 3 further comprising a loop filter configured to receive the current signal and generate a corresponding voltage signal, the voltage signal being provided to the oscillator.

5. The control system of claim 4 wherein the current signal includes a pulse with a substantially constant width and an amplitude representative of the phase difference.

6. The control system of claim 5 wherein the phase detector is configured to generate an UP signal or a DN as the first signal, the UP signal being generated when a phase of the reference signal leads a phase of the feedback signal, the DN signal being generated when a phase of the reference signal lags a phase of the feedback signal.

7. The control system of claim 6 wherein the charge pump includes a charging circuit in communication with the phase detector, the charging circuit configured to charge a capacitance element upon receipt of a charge signal, the charged capacitance having a voltage representative of the phase difference.

8. The control system of claim 7 wherein the charge signal results from an AND operation between the first signal and an inverse of a switch signal corresponding to the first signal, the switch signal configured to allow the loop filter to receive the current signal.

9. The control system of claim 7 wherein the charging circuit includes a charging switch configured to facilitate the charging of the capacitance element, and a drain switch configured to facilitate draining of the charge in the capacitance element.

10. The control system of claim 9 wherein the charging switch and the drain switch are in their respective states to inhibit charging of the capacitance element and to inhibit draining of the capacitance element, respectively, when the loop filter is receiving the current signal.

11. The control system of claim 7 wherein the charge pump includes a first current source configured to generate a positive current as the current signal for the UP signal and a second current source configured to generate a negative current as the current signal for the DN signal.

12. The control system of claim 11 wherein the current signal is modulated based on a combination of the UP signal and a pulse signal or a combination of the DN signal and the pulse signal.

13. The control system of claim 12 wherein the pulse signal is generated from the reference signal such that the pulse signal has substantially same frequency as the reference signal.

14. The control system of claim 13 wherein the combination of the UP signal and the pulse signal includes an AND combination of the pulse signal and an UP_TOGGLE signal that results from a flip-flop operation between the UP signal and an inverse of the pulse signal.

15. The control system of claim 14 wherein the combination of the DN signal and the pulse signal includes an AND combination of the pulse signal and a DN_TOGGLE signal that results from a flip-flop operation between the DN signal and an inverse of the pulse signal.

16. The control system of claim 15 wherein the charge pump further includes a first switch in communication with the first current source and a second switch in communication with the second current source, the first and second switches configured to be controlled to provide the modulation of the current signal.

17. The control system of claim 16 wherein the first switch or the second switch is engaged only when the capacitance element has a substantially full charge.

18. The control system of claim 1 further comprising a divider circuit in communication with the oscillator and the phase detector, the divider circuit configured to receive the output signal from the oscillator and generate an updated version of the feedback signal.

19. The control system of claim 18 further comprising a sigma delta modulator (SDM) in communication with the divider circuit to form a loop, the loop being configured to allow the output signal to have an output frequency that is a non-integer multiple of the frequency of the reference signal.

20. A wireless device comprising:

an antenna configured to facilitate reception of a radio-frequency (RF) signal;

a receiver in communication with the antenna, the receiver configured to process the RF signal; and

a frequency synthesizer in communication with the receiver, the frequency synthesizer circuit including a control system, the control system including a phase detector configured to receive a reference signal and a feedback signal, the phase detector further configured to generate a first signal representative of a phase difference between the reference signal and the feedback signal, the control system further including a charge pump in communication with the phase detector, the charge pump configured to generate a compensation signal based at least in part on the first signal, the control system further including an oscillator in communication with the charge pump, the oscillator configured to generate an output signal based on the compensation signal, the compensation signal configured to reduce or substantially eliminate one or more spurs associated with the frequency synthesizer.