PLATFORM POWER CONSUMPTION REDUCTION VIA POWER STATE SWITCHING

• US 20140181560A1
• Filed: 12/23/2013
• Published: 06/26/2014
• Est. Priority Date: 12/26/2012
• Status: Active Grant

• Current Assignee: Tahoe Research Limited (f/k/a Learndale Limited) (Vector Capital Corporation)
• Original Assignee: Intel Corporation
• Inventors: Muralidhar, Rajeev D., Seshadri, Harinarayanan, Rudramuni, Vishwesh M., Quinzio, Richard, Fiat, Christophe, Zayet, Aymen, Singh, Youvedeep, Mansoor, Illyas M.
• Granted Patent: US 10,007,323 B2
• Time in Patent Office: Days
• US Class Current: 713/323
• CPC Class Codes: G06F 1/3206 Monitoring of events, devices or parameters that trigger a change in power modality
• CPC Class Codes: G06F 1/3265 Power saving in display device
• CPC Class Codes: G06F 1/3287 by switching off individual functional units in the computer system
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Methods and apparatus relating to platform power consumption reduction via power state switching are described. In one embodiment, control logic causes a processor to enter a first low power consumption state (e.g., S0ix) instead of a second low power consumption state (e.g., S3) based on whether a threshold time period exists between a first wake event (e.g., corresponding to a first one of one or more awake requests) and a second wake event (e.g., corresponding to a second one of the one or more awake requests). Other embodiments are also claimed and disclosed.

Claims

1. An apparatus comprising:

control logic, the control logic at least partially comprising hardware logic, to cause a processor to enter a first low power consumption state instead of a second low power consumption state based on a threshold time period between a first wake event and a second wake event,

wherein the first low power consumption state is to consume more power than the second low power consumption state.

2. The apparatus of claim 1, wherein the first wake event is to correspond to a first one of one or more awake requests and the second wake event is to correspond to a second one of the one or more awake requests.

3. The apparatus of claim 2, wherein the one or more awake requests are to be generated in response to one or more requests from one of an application and a service.

4. The apparatus of claim 1, wherein the control logic is to cause the processor to enter the first low power consumption state based on a source of the first wake event or second wake event.

5. The apparatus of claim 1, further comprising a memory to store operating system software, wherein the operating system software is to trigger the first wake event or second wake event.

6. The apparatus of claim 5, wherein the operating system software is to trigger the first or second wake event based on a timer.

7. The apparatus of claim 1, wherein the control logic is to determine whether the processor is to enter the first low power consumption state based on one or more of workload, scenario, and usage conditions in a platform that comprises the processor.

8. The apparatus of claim 1, wherein the second low power consumption state comprises an idle state or a standby state.

9. The apparatus of claim 1, further comprising a memory to store application software, wherein the application software is to trigger the first wake event or second wake event.

10. The apparatus of claim 9, wherein the application software is to trigger the first or second wake event based on a timer.

11. The apparatus of claim 1, wherein the first or second wake event is to indicate resumption from a platform idle state.

12. The apparatus of claim 1, wherein the processor is to comprise a plurality of processor cores, wherein at least the first wake event or the second wake event is to cause at least one of the plurality of the processor cores to wake from the first or second low power consumption state.

13. The apparatus of claim 1, wherein the threshold time period is about 60 seconds.

14. A method comprising:

determining whether a threshold time period exists between a first wake event and a second wake event;

causing a processor to enter a first low power consumption state instead of a second low power consumption state based on the existence of the threshold time period,

wherein the first low power consumption state is to consume more power than the second low power consumption state.

15. The method of claim 14, further comprising determining whether one or more awake requests exist, wherein the first wake event corresponds to the first one of the one or more awake requests and the second wake event corresponds to a second one of the one or more awake requests.

16. The method of claim 14, further comprising causing the processor to enter the first low power consumption state based on a source of the first wake event or second wake event.

17. A computing system comprising:

a memory to store operating system software power management driver; and

a processor, coupled to the memory, to execute the operating system software power management driver, the processor comprising;

a plurality of processor cores; and

control logic, the control logic at least partially comprising hardware logic, coupled to at least a first processor core of the plurality of processor cores, to cause the first processor core to enter a first low power consumption state instead of a second low power consumption state based on whether a threshold time period exists between a first wake event and a second wake event,

wherein the first low power consumption state is to consume more power than the second low power consumption state.

18. The system of claim 17, wherein the first wake event is to correspond to a first one of one or more awake requests and the second wake event is to correspond to a second one of the one or more awake requests.

19. The system of claim 18, wherein the one or more awake requests are to be generated in response to one or more requests from one of an application and a service.

20. The system of claim 17, wherein the control logic is to cause the first processor core to enter the first low power consumption state based on a source of the first wake event or second wake event.

21. The system of claim 17, wherein the operating system software power management driver is to trigger the first wake event or second wake event based on a timer.

22. The system of claim 17, wherein the control logic is to determine whether the first processor core is to enter the first low power consumption state based on one or more of workload, scenario, and usage conditions in the system.

23. A computer-readable medium to store instructions that when executed by a processor cause the processor to:

determine whether a threshold time period exists between a first wake event and a second wake event;

cause the processor to enter a first low power consumption state instead of a second low power consumption state based on the existence of the threshold time period,

wherein the first low power consumption state is to consume more power than the second low power consumption state.

24. The computer-readable medium of claim 23, wherein the instructions are to cause the processor to generate one or more awake requests in response to one or more requests from one of an application and a service.

25. The computer-readable medium of claim 23, wherein the instructions are to cause the processor to enter the first low power consumption state based on a source of the first wake event or second wake event.