Phase Lock Loop Controlled Current Mode Buck Converter

• US 20140184180A1
• Filed: 01/08/2013
• Published: 07/03/2014
• Est. Priority Date: 12/28/2012
• Status: Active Grant

• Current Assignee: Dialog Semiconductor GmbH (Renesas Electronics Corporation)
• Original Assignee: Dialog Semiconductor GmbH (Renesas Electronics Corporation)
• Inventors: Kronmueller, Frank
• Granted Patent: US 8,860,393 B2
• Time in Patent Office: Days
• US Class Current: 323/271
• CPC Class Codes: G05F 1/595 semiconductor devices connected in series
• CPC Class Codes: H02M 1/0025 Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators

Abstract

A current mode buck converter has a power stage and a feedback stage. The power stage converts a higher power supply voltage level to a lower output voltage level. The feedback stage is connected with the power stage for controlling the levels of repetitive switching of an output current by phase and frequency locking a switching frequency of the output current to an external clocking signal. The feedback stage controls two levels of output current bounds by transforming a current error to a phase error to prevent error amplification such that an average output current remains constant at any duty cycle.

Claims

1. A feedback apparatus within a current mode buck converter comprising:

a first current level control circuit for establishing a first current level at which a switching stage within a power section of the current mode buck converter switches the direction of the slope of a current flowing through an inductor of the filter section of the power stage from a first directional slope to a second oppositely directional slope; and

a second current level control circuit for establishing a second current level at which a switching stage within a power section of the current mode buck converter switches the direction of the slope of the current flowing through the inductor of the filter section of the power stage from the second oppositely directional slope to the first directional slope;

wherein the second current level control circuit phase and frequency locks the current flowing through the inductor with a converter control clock applied to the second current level control circuit such that when the current flowing through the inductor is incorrectly triggered, the second current level is adjusted to lock the phase and frequency of the current flowing through the inductor to the converter control clock.

2. The feedback apparatus of claim 1 wherein the second current level control circuit comprises:

a phase/frequency detector connected to receive the converter control clock;

a loop filter connected to an output of the phase/frequency detector pass low frequency and phase differences with the converter control clock to generate an indicator of the second current level;

a second current comparator connected to receive the indicator of the second current level, connected to receive a indicator of a magnitude of the current flowing through the inductor to compare the indicator of the second current level with magnitude of the current flowing through the inductor to provide a comparison signal indicating if the current flowing through the inductor is greater than or lesser than the second current level, and connected to the phase/frequency detector to transfer the comparison signal with the converter control clock to generate the second current level.

3. The feedback apparatus of claim 2 wherein the second current comparator is connected to a reset terminal of a set-reset latch of a power switching section of the buck converter to reset the set-reset latch to cause the current flowing through the inductor to have a first directional slope.

4. The feedback apparatus of claim 3 wherein the first current level control circuit comprises:

an error amplifier connected to an output terminal of the buck converter to receive an output voltage level present at the output terminal and connected to a reference voltage source to compare the output voltage level with a reference voltage to determine any difference between the output voltage level and the reference voltage level to generate an error output signal indicative of the difference; and

a second current comparator connected to the buck converter to receive the magnitude of the current flowing through the inductor, connected to the error amplifier to receive the error output signal, and connected to a set terminal of the set-reset latch to cause the current flowing through the inductor to have a second oppositely directional slope.

5. A current mode buck converter comprising:

power stage for converting a higher power supply source to a lower output voltage level;

a feedback stage in communication with the power stage for controlling the levels of repetitive switching of an output current by phase and frequency locking a switching frequency of the output current to an external clocking signal and controlling two levels of output current bounds by transforming a current error to a phase error to prevent error amplification such that an average output current remains constant at any duty cycle.

6. The current mode buck converter of claim 5 wherein the feedback stage comprises:

a first current level control circuit for establishing a first current level at which power stage of the current mode buck converter switches the direction of the slope of a current flowing through the power stage from a first directional slope to a second oppositely directional slope; and

a second current level control circuit for establishing a second current level at which the power stage of the current mode buck converter switches the direction of the slope of the current flowing through the power stage from the second oppositely directional slope to the first directional slope;

wherein the second current level control circuit phase and frequency locks the current flowing through the power stage with a converter control clock applied to the second current level control circuit such that when the current flowing through the power stage is incorrectly triggered, the second current level is adjusted to lock the phase and frequency of the current flowing through the power stage to the converter control clock.

7. The current mode buck converter of claim 6 wherein he second current level control circuit comprises:

a phase/frequency detector connected to receive the converter control clock;

a loop filter connected to an output of the phase/frequency detector for passing low frequency and phase differences with the converter control clock to generate an indicator of the second current level;

a second current comparator connected to receive the indicator of the second current level, connected to receive an indicator of a magnitude of the current flowing through the power stage to compare the indicator of the second current level with magnitude of the current flowing through the power stage to provide a comparison signal indicating if the current flowing through the power stage is greater than or lesser than the second current level, and connected to the phase/frequency detector to transfer the comparison signal with the converter control clock to generate the second current level.

8. The current mode buck converter of claim 6 wherein the second current comparator is connected to the power stage to transfer a reset switching signal to cause the current flowing through the power stage to have a first directional slope.

9. The current mode buck converter of claim 7 wherein the first current level control circuit comprises:

an error amplifier connected to an output terminal of the buck converter to receive an output voltage level present at the output terminal and connected to a reference voltage source to compare the output voltage level is compared with a reference voltage to determine any difference between the output voltage level and the reference voltage level to generate an error output signal indicative of the difference; and

a third current comparator having a first input connected to the buck converter to receive the magnitude of the current flowing through the inductor, a second input connected to the error amplifier to receive the error output signal, and an output connected to a set terminal of the set-reset latch to transfer a set switching signal to cause the current flowing through the power stage to have a second oppositely directional slope.

10. The current mode buck converter of claim 5 wherein the power stage comprises:

a switching section connected to the power supply voltage source and a substrate supply voltage source; and

a filter section connected to the switch section wherein the switch section alternately connects the power supply voltage source and the substrate supply voltage source to the filter section.

11. The current mode buck converter of claim 10 wherein the switching section comprises:

a set-reset latch having a set terminal connected to receive the set switching signal, a reset terminal connected to receive the reset switching signal, and a data output terminal for transferring an output signal;

a first transistor of a first conductivity type having a source connected to the power supply voltage source, a gate in communication with the set-reset latch to receive the output signal, and a drain connected to the filter section to provide the current flowing through the power stage from the power supply voltage source; and

a second transistor of a second conductivity type having a source connected to the substrate supply voltage source, a gate in communication with the set-reset latch to receive the output signal, and a drain connected to the filter section to sink the current flowing through the power stage from the substrate supply voltage source.

12. The current mode buck converter of claim 11 wherein the switching section further comprises:

a driver having an input connected to the output terminal of the set-reset latch and an output to the gates of the first and second transistors to condition the output signal from the set-reset latch for driving the first and second transistors.

13. The current mode buck converter of claim 11 wherein the filter section comprises:

an inductor having a first terminal connected to the commonly connected sources of the first and second transistor for transferring the current flowing through the power stage from the power supply voltage source during the first directional slope of the current flowing through the power stage or to the substrate supply voltage source during the second oppositely directional slope of the current flowing through the power stage; and

an output capacitor having a first terminal connected to a second terminal of the inductor and a second terminal connected to the substrate supply voltage source for charging to an output voltage level based on the a duty cycle of the switching frequency of the output current, wherein the second terminal of the inductor and the first terminal of the capacitor are connected to an output terminal of the filter section to provide an output voltage and current to an output load connected to the output terminal.

14. The current mode buck converter of claim 13 wherein the output terminal is in communication with the feedback stage to transfer the indicator of the magnitude of the current flowing through the power stage.

15. The current mode buck converter of claim 14 wherein the indicator of the magnitude of the current flowing through the power stage is a voltage drop across an equivalent series resistance of the inductor, a voltage developed across a resistor in series with the inductor, or a voltage developed as a magnetic pickup from the current flowing through the power stage.

16. A method for controlling the levels of repetitive switching of an output current of a current mode buck converter comprising the steps of:

phase and frequency locking the switching frequency of the output current to an external clocking signal;

controlling bounds of two levels of the output current;

determining a current error of the output current for each of the two bounds of the two level of the output current;

forcing the output current to remain within a first of the two bounds; and

transforming the current error of the output current from a second of the two bounds to a phase error for preventing error amplification such that the average current remains constant at any duty cycle.

17. The method for controlling the levels of repetitive switching of the output current of the current mode buck converter of claim 16 wherein transforming the current error comprises the steps of:

forming a reset triggering pulse by comparing an indication of the second of the two bounds and the output current, wherein the reset triggering pulse changes state when the output current is greater than and less than the indication of the second of the two bounds;

transforming phase and frequency difference between a reset triggering pulse and the external clocking signal;

triggering the buck converter to maintain the output current between the first output current level and the second output current level;

adjusting the second level output current level to maintain the phase and frequency locking of the buck converter with the external clocking signal to maintain the phase and frequency locking of the switching of the buck converter with the external clocking signal such that subharmonic noise is eliminated over all duty cycles of the buck converter.

18. The method for controlling the levels of repetitive switching of the output current of the current mode buck converter of claim 17 wherein adjusting the second level output current permits changes in an inductor value of a filter section of the buck converter are compensated for automatically.

19. The method for controlling the levels of repetitive switching of the output current of the current mode buck converter of claim 16 wherein controlling comprises:

sensing a magnitude of the output current;

sensing an output voltage of the buck converter;

comparing the output of the output voltage with a reference voltage to determine an error signal that is amplified to indicate a first output current level;

comparing the signal indicating the magnitude of the output current to the first output current level for determining that the magnitude of the output current has exceeded the first output current level; and

switching a slope of the output current to a first directional slope.

23. The apparatus for controlling the levels of repetitive switching of the output current of the current mode buck converter of claim 16 wherein means for controlling comprises:

means for sensing a magnitude of the output current;

means for sensing an output voltage of the buck converter;

means for comparing the output of the output voltage with a reference voltage to determine an error signal that is amplified to indicate a first output current level;

means for comparing the signal indicating the magnitude of the output current to the first output current level for determining that the magnitude of the output current has exceeded the first output current level; and

means for switching a slope of the output current to a first directional slope.

20. An apparatus for controlling the levels of repetitive switching of an output current of a current mode buck converter comprising:

means for phase and frequency locking the switching frequency of the output current to an external clocking signal;

means for controlling bounds of two levels of the output current;

means for determining a current error of the output current for each of the two bounds of the two level of the output current;

means for forcing the output current to remain within a first of the two bounds; and

means for transforming the current error of the output current from a second of the two bounds to a phase error for preventing error amplification such that the average current remains constant at any duty cycle.

21. The apparatus for controlling the levels of repetitive switching of the output current of the current mode buck converter of claim 20 wherein means for transforming the current error comprises:

means for forming a reset triggering pulse by comparing an indication of the second of the two bounds and the output current, wherein the reset triggering pulse changes state when the output current is greater than and less than the indication of the second of the two bounds;

means for transforming phase and frequency difference between a reset triggering pulse and the external clocking signal;

means for triggering the buck converter to maintain the output current between the first output current level and the second output current level;

means for adjusting the second level output current level to maintain the phase and frequency locking of the buck converter with the external clocking signal to maintain the phase and frequency locking of the switching of the buck converter with the external clocking signal such that subharmonic noise is eliminated over all duty cycles of the buck converter.

22. The apparatus for controlling the levels of repetitive switching of the output current of the current mode buck converter of claim 21 wherein means for adjusting the second level output current permits changes in an inductor value of a filter section of the buck converter are compensated for automatically.