In-Line Transistor Bandwidth Measurement

• US 20140184242A1
• Filed: 01/02/2013
• Published: 07/03/2014
• Est. Priority Date: 01/02/2013
• Status: Abandoned Application

• Current Assignee: Globalfoundries US Incorporated (GlobalFoundries, Inc.)
• Original Assignee: International Business Machines Corporation
• Inventors: Hedberg, Erik L., Lea, Dallas M., Zier, Steven J., Kim, Daeik D., Sutton, Akil K.
• Application Number:
  US13/732,474
• Publication Number:
  US 20140184242A1
• Time in Patent Office: Days
• US Class Current: 324/615
• CPC Class Codes: G01R 31/2625 for measuring gain factor thereof
• CPC Class Codes: G01R 31/2884 using dedicated test connectors, test elements or test circuits on the IC under test G01R31/2855 takes precedence

Abstract

A method and apparatus measure transistor bandwidth of a device under test in-line and on-wafer. The method includes disposing a measurement circuit on a chip within a wafer, the measurement circuit including a ring oscillator generating an oscillation frequency for transition through the device under test on the wafer, and obtaining an amplitude gain based on the measurement circuit for the corresponding frequency.

Claims

1. A method of measuring transistor bandwidth of a device under test in-line and on-wafer, the method comprising:

disposing a measurement circuit on a chip within a wafer, the measurement circuit including a ring oscillator generating an oscillation frequency for transition through the device under test on the wafer; and

obtaining an amplitude based on the measurement circuit for the corresponding oscillation frequency.

2. The method according to claim 1, wherein the device under test is a switching circuit.

3. The method according to claim 1, wherein the device under test is a current mode logic (CML) chain.

4. The method according to claim 1, wherein the disposing the measurement circuit is in the kerf area of the wafer.

5. The method according to claim 1, wherein the disposing the measurement circuit includes disposing a decoder, the ring oscillator, a converter, and a peak and valley detector.

6. The method according to claim 3, further comprising applying digital inputs to the decoder to enable select lines driving the ring oscillator to generate the oscillation frequency

7. The method according to claim 3, further comprising obtaining the amplitude based on an output of the device under test to the peak and valley detector.

8. The method according to claim 1, wherein the disposing the measurement circuit further includes disposing a static divider to divide the oscillation frequency generated by the ring oscillator and provide a down-converted frequency.

9. The method according to claim 8, further comprising the measurement circuit outputting the amplitude and the down-converted frequency for display or storage.

10. The method according to claim 9, further comprising disposing a controller including a processor to process the amplitude and corresponding down-converted frequency.

11. The method according to claim 1, further comprising performance benchmarking a product design including a device corresponding with the device under test based on the bandwidth.

12. A method of measuring transistor bandwidth of a device under test in-line and on-wafer, the method comprising:

applying digital inputs to a decoder to enable corresponding select lines;

driving a ring oscillator with the select lines to generate a corresponding frequency output; and

obtaining amplitude from the device under test based on the frequency output.

13. The method according to claim 12, further comprising storing the amplitude and corresponding frequency for a set of frequency output.

14. The method according to claim 13, wherein generating the set of frequency output includes applying different respective digital inputs to the decoder.

15. The method according to claim 12, further comprising performance benchmarking a product design including a device corresponding with the device under test based on the bandwidth.

16. An apparatus to measure transistor bandwidth of a device under test in-line and on-wafer, the apparatus comprising:

a decoder including digital input lines and output select lines disposed on a chip within a wafer that includes the device under test;

a ring oscillator configured to be driven by the select lines and to generate a frequency output; and

a peak and valley detector configured to receive an output from the device under test based on the frequency output of the ring oscillator and to measure amplitude as a peak-to-valley value.

17. The apparatus according to claim 16, wherein the device under test is a switching circuit.

18. The apparatus according to claim 16, wherein the device under test is a current mode logic (CML) chain.

19. The apparatus according to claim 16, further comprising a static divider to down-convert the frequency output and output a down-converted frequency output.

20. The apparatus according to claim 19, further comprising a controller including a processor, memory device, and display device, the controller configured to store or display the amplitude and corresponding down-converted frequency output.