METHOD AND APPARATUS FOR SENDING PARTIAL FRAME UPDATES RENDERED IN A GRAPHICS PROCESSOR TO A DISPLAY USING FRAMELOCK SIGNALS

• US 20140184611A1
• Filed: 12/31/2012
• Published: 07/03/2014
• Est. Priority Date: 12/31/2012
• Status: Abandoned Application

• Current Assignee: NVIDIA Corporation
• Original Assignee: NVIDIA Corporation
• Inventors: Wyatt, David, Stears, David
• Application Number:
  US13/732,063
• Publication Number:
  US 20140184611A1
• Time in Patent Office: Days
• US Class Current: 345/501
• CPC Class Codes: G09G 2310/04 Partial updating of the display screen
• CPC Class Codes: G09G 2320/103 Detection of image changes, e.g. determination of an index representative of the image change
• CPC Class Codes: G09G 2330/022 in absence of operation, e.g. no data being entered during a predetermined time
• CPC Class Codes: G09G 2360/127 Updating a frame memory using a transfer of data from a source area to a destination area
• CPC Class Codes: G09G 3/36 using liquid crystals

Abstract

Embodiments of the present invention may include a graphics processor operable to generate video frames, wherein the graphics processor is operable to begin generating a partial update region of a video frame upon receiving a framelock signal. Further, a screen refresh controller may be communicatively coupled with the graphics processor, wherein the screen refresh controller is operable to receive partial update regions of video frames from the graphics processor and send framelock signals to the graphics processor. Additionally, a display device may be communicatively coupled with the screen refresh controller, wherein the display device is operable to receive and display video frames from the screen refresh controller.

Claims

1. An apparatus comprising:

a graphics processor operable to generate video frames, wherein said graphics processor is operable to begin generating a partial update region of a video frame upon receiving a framelock signal;

a screen refresh controller communicatively coupled with said graphics processor, wherein said screen refresh controller is operable to receive partial update regions of video frames from said graphics processor and send framelock signals to said graphics processor; and

a display device communicatively coupled with said screen refresh controller, wherein said display device is operable to receive and display video frames from said screen refresh controller.

2. The apparatus of claim 1, wherein when said graphics processor begins generating a first partial update region of a first video frame upon receiving a framelock signal, said screen refresh controller is operable to scan out to said display device at least a portion of said first video frame while said graphics processor generates said first partial update region.

3. The apparatus of claim 2, wherein after a completion of generating said first partial update region and before receiving another framelock signal, said graphics processor is operable to begin generating a second partial update region of a second video frame.

4. The apparatus of claim 1, wherein said partial update region of said video frame comprises a subsection of a previous video frame.

5. The apparatus of claim 1, wherein said graphics processor is operable to rest after completing generating said video frame until receiving another framelock signal from said screen refresh controller.

6. The apparatus of claim 1, wherein said graphics processor generates said video frame at a generation rate slower than a maximum generation rate of said graphics processor but sufficiently fast to complete said generation before receiving a subsequent framelock signal from said screen refresh controller.

7. The apparatus of claim 1, wherein said graphics processor is operable to generate video frames at a generation rate slower than a frame rate at which said display device is operable to display video frames.

8. The apparatus of claim 1, wherein said screen refresh controller is operable to send a framelock signal in synchronization with a beginning of a frame scan out operation of said display device.

9. A method comprising:

displaying a first frame on a display device during a first frame cycle of said display device;

sending a first framelock signal to a graphics processor at the beginning of a second frame cycle of said display device, wherein said first framelock signal causes said graphics processor to generate a partial update region of said first frame to form a second frame; and

sending said second frame to said display device for display.

10. The method of claim 9, wherein said sending said second frame occurs during said second frame cycle of said display device.

11. The method of claim 9, further comprising sending at least a portion of said second frame while said graphics processor generates said first partial update region of said first frame.

12. The method of claim 9, wherein said sending said second frame to said display device begins before a completion of said generating said second frame.

13. The method of claim 9, further comprising resting said graphics processor after said graphics processor completes generating said second frame until receiving a second framelock signal

14. The method of claim 9, wherein said generating said second frame occurs at a generation rate slower than a maximum generation rate of said graphics processor but sufficiently fast to complete said generating before receiving a second framelock signal.

15. A computer system comprising:

a processing unit;

a graphics processing system coupled to said processor and comprising a graphics processor, wherein said graphics processor is operable to generate video frames and begin generating a partial update region of a video frame upon receiving a framelock signal;

memory coupled to said graphics processing system;

a screen refresh controller communicatively coupled with said graphics processor, wherein said screen refresh controller is operable to receive partial update regions of video frames from said graphics processor and send framelock signals to said graphics processor; and

a display device communicatively coupled with said screen refresh controller, wherein said display device is operable to receive and display video frames from said screen refresh controller.

16. The computer system of claim 15, wherein when said graphics processor begins generating a first partial update region of a first video frame upon receiving a framelock signal, said screen refresh controller is operable to scan out to said display device at least a portion of said first video frame while said graphics processor generates said first partial update region.

17. The computer system of claim 16, wherein after a completion of generating said first partial update region and before receiving a second framelock signal, said graphics processor is operable to begin generating a second partial update region of a second video frame.

18. The computer system of claim 15, wherein said partial update region of said video frame includes a subsection of a previous video frame.

19. The computer system of claim 15, wherein said graphics processor is operable to rest after completing generating said video frame until receiving a second framelock signal from said screen refresh controller.

20. The computer system of claim 15, wherein said graphics processor generates said video frame at a generation rate slower than a maximum generation rate of said graphics processor but sufficiently fast to complete said generation before receiving a second framelock signal from said screen refresh controller.