DISPLAY DEVICE WITH BINARY MODE AMOLED PIXEL PATTERN

• US 20140184667A1
• Filed: 12/28/2012
• Published: 07/03/2014
• Est. Priority Date: 12/28/2012
• Status: Abandoned Application

• Current Assignee: NVIDIA Corporation
• Original Assignee: NVIDIA Corporation
• Inventors: Xu, Shuang
• Application Number:
  US13/730,525
• Publication Number:
  US 20140184667A1
• Time in Patent Office: Days
• US Class Current: 345/692
• CPC Class Codes: G09G 2300/0828 forming a digital to analog [D/A] conversion circuit
• CPC Class Codes: G09G 3/2074 using sub-pixels
• CPC Class Codes: G09G 3/3225 using an active matrix

Abstract

An AMOLED display panel comprising a plurality of color elements in each pixel with each of the color elements comprising a discrete plurality of illuminating units associated with a plurality of transistors operating in a binary mode. The plurality of illuminating units have different sizes in accordance with 2ⁿ size, where n is the illuminating unit'"'"'s number. n may also be the bit position of the bit line that controls the illuminating unit. The collective luminance of each color element can be digitally controlled by selectively activating a combination of the discrete illuminating units to their nominal luminance. The discrete plurality of illuminating units in each pixel may be directly controlled by RGB pixel data without the requirement for digital analog conversion.

Claims

1. A flat panel display apparatus comprising:

a cathode layer;

an Organic Light-Emitting Diode (OLED) layer disposed proximate to said cathode layer wherein said OLED layer comprises a plurality of pixels arranged in a matrix, each of said plurality of pixels comprising a plurality of color elements and each of said color elements comprising a plurality of diode junctions arranged in accordance with a pattern;

a plurality of sets of transistors, each respective set of transistors corresponding to, and coupled to control, a respective color element of said OLED layer wherein each respective diode junction of said respective color element is coupled to a respective transistor of said respective set of transistors; and

an anode layer.

2. The flat panel display as described in claim 1 wherein each set of transistors is controlled by a binary color value applied thereto.

3. The flat panel display as described in claim 2 wherein each respective diode junction of a color element is controlled by a respective bit of a corresponding binary color value.

4. The flat panel display as described in claim 3 wherein a nominal luminance of each respective diode junction of a color element corresponds to an area size thereof.

5. The flat panel display as described in claim 4 wherein said area size of each respective diode junction corresponds to a binary value represented by a respective bit position of a respective bit in a corresponding binary color value applied thereto.

6. The flat panel display as described in claim 1 wherein each respective transistor of said respective set of transistors is operable to control luminance of a respective diode junction in a binary mode.

7. The flat panel display as described in claim 1 wherein each set of transistors are coupled with a set of storage devices coupled to a frame refresh clock, said set of storage devices operable to store said binary color value.

8. The flat panel display as described in claim 1 wherein a global luminance of said plurality of pixels of said display panel is adjustable by adjusting an analog voltage across said cathode layer and said anode layer.

9. The flat panel display as described in claim 1 wherein said plurality of sets of transistors are integrated on a Thin-Film-Transistor (TFT) layer.

10. A system comprising:

a memory storing image data;

a display panel, operable to display said image data, wherein said display panel comprises;

a cathode layer;

an anode layer;

an Active Matrix Organic Light-Emitting Diode (AMOLED) layer disposed proximate to said cathode layer and said anode layer, said AMOLED comprising a plurality of pixels arranged in a matrix, each of said plurality of pixels comprising a plurality of color elements and each of said plurality of color elements comprising a plurality of diode junctions; and

a plurality of sets of switches, each respective set of switches corresponding to, and coupled to control, a respective color element of said AMOLED layer wherein each respective diode junction of said respective color element is coupled to a respective switch of said respective set of switches; and

a display control logic, coupled to said memory and said plurality of sets of transistors, and operable to control luminance of each respective diode junction of said respective color element by controlling each of said respective set of switches.

11. The system as described in claim 10 wherein said plurality of sets of switches comprise a plurality of sets of transistors disposed in a Thin-Film-Transistor (TFT) layer, and wherein each of said plurality of sets of transistors in the TFT layer comprises a gate configured to receive a respective bit of a corresponding binary color value from said display control logic, a drain coupled to said anode layer, and a source coupled to a respective diode junction of said flat panel display.

12. The flat panel display as described in claim 10

wherein a total number of the plurality of diode junctions comprised in a respective color element is equal to a total number of bits in a corresponding binary color value, and

wherein each respective diode junction comprised in said respective color element has nominal luminance proportional to 2ⁿ, wherein n indicates a bit position of a respective bit in said corresponding binary color configured to control said each respective diode junction.

13. The system as described in claim 12 wherein said corresponding binary color value is an 8-bit binary number used in an RGB color model.

14. The system as described in claim 13 wherein said plurality of sets of switches are coupled to a plurality of storage devices, said plurality of storage devices coupled to a frame refresh clock, and configured to store said binary color and to control said each respective set of transistors.

15. The system as described in claim 10 wherein global luminance of said display panel is adjustable by varying a voltage across said cathode layer and said anode layer.

16. A method for displaying images on a display device, said method comprising

receiving image data, said image data comprising a binary number representing luminance of a color element of a corresponding pixel of said display device, said color element comprising a plurality of discrete illuminating units;

and

controlling each of said plurality of discrete illuminating units individually between a first state and a second state with a respective bit of said binary number.

17. The method as described in claim 16, wherein said plurality of discrete illuminating units comprise Organic Light-Emitting Diodes (OLED).

18. The method as described in claim 16, wherein said plurality of discrete illuminating units in said color element are respectively coupled to a plurality of transistors, each of said plurality of transistors configured to receive a respective bit of said binary number, and to provide binary control to an associated illuminating unit.

19. The method as described in claim 18, wherein each respective discrete illuminating unit in said color element has nominal luminance proportional to 2ⁿ, wherein n indicates a bit position of a respective bit in said binary number configured to control said each respective discrete illuminating unit.

20. The method as described in claim 18, wherein said display device comprises an anode layer and a cathode layer coupled to a first voltage and a second voltage respectively, and wherein said method further comprises controlling global luminance of said display device by adjusting a difference between said first voltage and said second voltage.

21. The method as described in claim 16, wherein said binary number is an 8-bit binary number used in a RGB color model, and wherein a total number of said plurality of discrete illuminating units in said color element equals to 8.

22. The method as described in claim 16 further comprising decoding said binary number into a decoded binary number, wherein said controlling each of said plurality of discrete illuminating units individually comprises controlling each of said plurality of discrete illuminating units with said decoded binary number, and wherein a total number of said plurality of discrete illuminating unit in said color element is equal to a total number of bits in said decoded binary number.