FLEXIBLE ARCHITECTURE FOR ACOUSTIC SIGNAL PROCESSING ENGINE
First Claim
8. A device, comprising:
- a processing core to execute instruction set instructions;
storage to store instructions executable by the processing core;
a Gaussian mixture (GMM) score generator to receive algorithm inputs indicative of any of a plurality of GMM speech recognition algorithms and generate a GMM score for the feature vector based on the GMM speech recognition algorithm indicated by the algorithm inputs;
a microphone; and
a microcontroller to;
group audio samples from the microphone into blocks and perform feature extraction on the group;
invoke the GMM score generator to score extracted features;
indicate, based on the generated scores, whether the audio was speech; and
wake up features of the device responsive to determining that the audio was speech.
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Accused Products
Abstract
A disclosed speech processor includes a front end to receive a speech input and generate a feature vector indicative of a portion of the speech input and a Gaussian mixture (GMM) circuit to receive the feature vector, model any one of a plurality of GMM speech recognition algorithms, and generate a GMM score for the feature vector based on the GMM speech recognition algorithm modeled. In at least one embodiment, the GMM circuit includes a common compute block to generate feature a vector sum indicative of a weighted sum of differences squares between the feature vector and a mixture component of the GMM speech recognition algorithm. In at least one embodiment, the GMM speech recognition algorithm being modeled includes a plurality of Gaussian mixture components and the common compute block is operable to generate feature vector scores corresponding to each of the plurality of mixture components.
30 Citations
28 Claims
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8. A device, comprising:
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a processing core to execute instruction set instructions; storage to store instructions executable by the processing core; a Gaussian mixture (GMM) score generator to receive algorithm inputs indicative of any of a plurality of GMM speech recognition algorithms and generate a GMM score for the feature vector based on the GMM speech recognition algorithm indicated by the algorithm inputs; a microphone; and a microcontroller to; group audio samples from the microphone into blocks and perform feature extraction on the group; invoke the GMM score generator to score extracted features; indicate, based on the generated scores, whether the audio was speech; and wake up features of the device responsive to determining that the audio was speech. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A processor, comprising:
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a processing core to execute instruction set instructions; an audio interface to receive feature vector data comprising a digital representation of a speech sample; and a Gaussian mixture (GMM) score generator to generate a GMM score corresponding to the feature vector, wherein the GMM scoring logic includes; weighted sum of differences squared (SODS) logic to compute a GMM sum indicative of differences between elements of the feature vector and corresponding elements of a GMM component mixture. - View Dependent Claims (16, 17, 18, 19)
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20. A computer readable storage medium including processor executable instructions, which when executed by the processor, cause the processor to:
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provide algorithm selection inputs indicative of a first speech recognition algorithm to Gaussian mixture (GMM) scoring logic; detect a feature vector comprising a digital representation of an interval of speech; invoke the GMM scoring logic to generate a GMM score for the feature vector based on the first speech recognition algorithm; and initiate a search for text based on the GMM score. - View Dependent Claims (1, 2, 3, 4, 5, 6, 7, 21, 22, 23)
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22-1. The computer readable storage medium of claim 20, wherein the instructions further include instructions to display the text on a display device.
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24. A tangible machine readable medium having stored thereon a set of information representing hardware logic circuits, which if used by a machine, causes the machine to fabricate hardware logic circuits, including:
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a first logic circuit to receive a feature vector and compute a sum of weighted differences squared value based on the feature vector and a mixture vector including a mean vector and a variance vector; and a second logic circuit to receive, from the first logic, the sum of weighted differences squared values for each of a plurality of mixture vectors associated with a Gaussian mixture mode implementation and generate a Gaussian mixture mode score based on a Gaussian mixture mode scoring algorithm. - View Dependent Claims (25, 26, 27, 28)
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Specification