GENERAL INPUT/OUTPUT ARCHITECTURE, PROTOCOL AND RELATED METHODS TO IMPLEMENT FLOW CONTROL

• US 20140189174A1
• Filed: 12/30/2013
• Published: 07/03/2014
• Est. Priority Date: 08/24/2001
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Ajanovic, Jasmin, Harriman, David, Fanning, Blaise, Lee, David
• Granted Patent: US 9,602,408 B2
• Time in Patent Office: Days
• US Class Current: 710/106
• CPC Class Codes: G06F 13/124 where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices
• CPC Class Codes: G06F 13/4059 where the synchronisation uses buffers, e.g. for speed matching between buses
• CPC Class Codes: G06F 13/42 Bus transfer protocol, e.g. handshake; Synchronisation
• CPC Class Codes: G06F 13/4221 being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
• CPC Class Codes: G06F 13/4252 using a handshaking protocol
• CPC Class Codes: G06F 13/4265 on a point to point bus G06F13/4247, G06F13/4282 take precedence
• CPC Class Codes: G06F 13/4269 using a handshaking protocol, e.g. Centronics connection
• CPC Class Codes: G06F 13/4282 on a serial bus, e.g. I2C bus, SPI bus on daisy chain buses G06F13/4247
• CPC Class Codes: G06F 5/06 for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor G06F7/78 takes precedence
• CPC Class Codes: H04L 47/10 Flow control; Congestion control
• CPC Class Codes: H04L 47/30 in combination with information about buffer occupancy at either end or at transit nodes

Abstract

An enhanced general input/output communication architecture, protocol and related methods are presented.

Claims

1. An apparatus, comprising:

a protocol stack including layers to communicate data over an interconnect;

a transmitter to transmit data on a point to point interconnect;

wherein the protocol stack including layers comprises a data link layer, and a transactions layer; and

wherein the protocol stack is to assemble a plurality of messages, at least one of the messages to include a credits field to indicate a total number of credits to be granted from the receiver layer.

2. The apparatus of claim 1, wherein the message is a message frame.

3. The apparatus of claim 1, wherein the protocol stack including layers comprises a physical layer.

4. The apparatus of claim 1, wherein the interconnect includes a communication link.

5. The apparatus of claim 1, wherein the message does not encapsulate a packet.

6. The apparatus of claim 1 further comprising a transmitter which includes a counter to track a number of credits consumed.

7. The apparatus of claim 1, wherein the credits field to indicate a total number of credits granted from the receiver layer.

8. The apparatus of claim 7, wherein the counter may track up to at least sixty-three credits.

9. The apparatus of claim 7, wherein the counter is set to zero upon initialization.

10. A method, comprising:

utilizing a protocol stack including layers to communicate data over an interconnect;

utilizing a transmitter to transmit data on a point to point interconnect;

wherein the protocol stack including layers comprises a data link layer, and a transactions layer; and

utilizing the protocol stack is to assemble a plurality of messages, at least one of the messages to include a credits field to indicate a total number of credits granted from the receiver layer.

11. The method of claim 10 further comprising utilizing a receiver to transmit information about a current memory space available to store data.

12. The method of claim 10 further comprising utilizing a transmitter which includes a counter to track a number of credits consumed.

13. The method of claim 12 further comprising resetting the counter to zero upon system reset.

14. The method of claim 10 further comprising refraining from sending packets from a transmitter to a receiver when the credits field has a value of zero therein.

15. The method of claim 10 wherein the messages are to achieve flow control of data between devices.

16. The method of claim 15, wherein flow control is performed by the transaction layer in cooperation with the data link.

17. A non-transitory computer readable medium storing computer readable instructions for machine execution of a method for:

utilizing a protocol stack including layers to communicate data over an interconnect;

utilizing a transmitter to transmit data on a point to point interconnect;

wherein the protocol stack including layers comprises a data link layer, and a transactions layer; and

utilizing the protocol stack is to assemble a plurality of messages, at least one of the messages to include a credits field to indicate a total number of credits granted from the receiver layer.

18. The non-transitory computer readable medium of claim 17, wherein the messages are communicated from a first device to a second device over the interconnect.

19. A system-on-a-chip (SoC) embedded within a mobile device, comprising:

a protocol stack including layers to communicate data over an interconnect; and

a transmitter to transmit data on a point to point interconnect;

wherein the protocol stack including layers comprises a data link layer, and a transactions layer;

wherein the protocol stack is to assemble a plurality of messages, at least one of the messages to include a credits field to indicate a total number of credits granted from the receiver layer.

20. The SoC of claim 19 is an embedded component within a smartphone.

21. The SoC of claim 19 further comprises a transmitter which includes a counter to track a number of credits consumed and a receiver to transmit information about a current memory space available to store data.