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On-Chip Bus Arbitration Method and Device Thereof

  • US 20140189181A1
  • Filed: 10/14/2011
  • Published: 07/03/2014
  • Est. Priority Date: 06/07/2011
  • Status: Abandoned Application
First Claim
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1. A method for on-chip bus arbitration, comprising:

  • dividing devices into a first level, a second level and a third level from high to low; and

    in each arbitration period, executing the following steps;

    calculating remaining processing time of each real-time transaction, and upgrading a device making a request required to be processed immediately to the first level in a current arbitration period;

    monitoring a bandwidth usage amount of a device of the first level and a bandwidth usage amount of a device of the second level, and downgrading a device whose bandwidth usage amount exceeds a preset bandwidth threshold value to the third level in the current arbitration period; and

    in devices making requests for a bus use right, when a device of a highest level is the device of the first level, authorizing the device of the first level; and

    when the device of the highest level is not the device of the first level, authorizing a device making continuous requests;

    wherein, the continuous requests are requests whose read-write types are the same as that of a last authorized transaction, and whose addresses hit a same row or different memory banks as an address of the last authorized transaction does.

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