SHIELDS FOR MAGNETIC MEMORY CHIP PACKAGES

• US 20140197505A1
• Filed: 01/12/2013
• Published: 07/17/2014
• Est. Priority Date: 01/12/2013
• Status: Active Grant

• Current Assignee: Avalanche Technology Incorporated
• Original Assignee: Avalanche Technology Incorporated
• Inventors: Zhou, Yuchen, Ranjan, Rajiv Yadav, Abedifard, Ebrahim, Malmhall, Roger Klas, Wang, Zihui, Huai, Yiming, Zhang, Jing, Sardinha, Bernardo
• Granted Patent: US 9,070,692 B2
• Time in Patent Office: Days
• US Class Current: 257/422
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/15174 in different layers of the multilayer substrate
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA

Abstract

Chip packages are described with soft-magnetic shields that are included inside or attached externally to the package containing a MRAM chip. In one group of embodiments a single shield with vias for bonding wires is affixed to the surface of the MRAM chip having the contact pads. The limitation of shield to chip distance due to bonding wire is eliminated by VIA holes according to the invention which achieves minimal spacing between the shield and chip. A second shield without vias can be positioned on the opposite side of the chip from the first shield. In one group of embodiments a hardened ferro-fluid shield can be the only shield or the structure can include a shield with or without vias. One group of embodiments includes an external shield with vias for solder access to the package contact pads affixed to the outer surface of the package.

Claims

1. A chip package including:

an MRAM chip with a set of chip contact pads on a first surface of the MRAM chip;

a set of package contact pads disposed on an exterior surface of the package;

a set of bonding wires connecting the chip contact pads to the package contact pads; and

a first soft-magnetic shield disposed inside the package adjacent to the first surface of the MRAM chip, a surface of the first shield confronting the MRAM chip being larger than the first surface of the MRAM chip and extending beyond the MRAM chip on opposing sides, the first shield having at least one via with at least one bonding wire passing through the via.

2. The chip package of claim 1 wherein the first soft-magnetic shield is a homogeneous material that is an alloy of Fe and/or Co and any of the following Ni, Mn, Ir, Mg, Al, Ta, Ti, Pt, Pd, Ru, Cr, Cu, Hf, Zr, Si, C, Ge, W, Nb, Nd, Zn, Au, Ag, Cu, Mo, V, Ru, O and N.

3. The chip package of claim 1 wherein the first soft-magnetic shield includes magnetic particles in a non-magnetic matrix.

4. The chip package of claim 3 wherein the non-magnetic matrix is a non-magnetic metal or alloy, polymer, oxide, carbide, nitride, silicide, carbonate, sulfate, or silicon.

5. The chip package of claim 3 wherein the magnetic particles are composed of an alloy of Fe and/or Co and any of the following Ni, Mn, Ir, Mg, Al, Ta, Ti, Pt, Pd, Ru, Cr, Cu, Hf, Zr, Si, C, Ge, W, Nb, Nd, Zn, Au, Ag, Cu, Mo, V, Ru, O and N.

6. The chip package of claim 3 wherein the magnetic particles are ferromagnetic.

7. The chip package of claim 3 wherein the magnetic particles are ferri-magnetic.

8. The chip package of claim 3 wherein the magnetic particles are super-paramagnetic.

9. The chip package of claim 3 wherein the magnetic particles have a particle size less than one hundred microns.

10. The chip package of claim 3 wherein the magnetic particles have an approximate particle size from 5 nm to 500 nm.

11. The chip package of claim 1 wherein the first soft-magnetic shield is laminated and includes layers of soft magnetic material separated by non-magnetic spacer layers.

12. The chip package of claim 11 wherein the first soft-magnetic shield includes at least one layer of metallic magnetic foil.

13. The chip package of claim 1 wherein the first soft-magnetic shield is flexible.

14. The chip package of claim 1 wherein the first shield has a thickness equal to or greater than a thickness of the MRAM chip measured along a selected line passing through the first shield and the MRAM chip.

15. The chip package of claim 1 wherein the first shield is bonded to the MRAM chip.

16. The chip package of claim 1 further comprising a second soft-magnetic shield disposed inside the chip package adjacent to a second surface of the MRAM chip opposite to first surface the MRAM chip, a surface of the second soft-magnetic shield confronting the MRAM chip being larger than the second surface of the MRAM chip and extending beyond the MRAM chip on opposing sides.

17. The chip package of claim 1 wherein the first shield is disposed adjacent to an outer wall of the chip package.

18. The chip package of claim 1 wherein the MRAM chip is disposed adjacent to an outer wall of the chip package and first surface of the MRAM chip with the set of chip contact pads faces away from the outer wall of the chip package and toward the first shield.

19. The chip package of claim 18 wherein a set of bonding wires extend out through vias in the first shield and pass through an interior area of the chip package before connecting to the set of package contact pads.

20. The chip package of claim 1 further comprising a magnetically-soft, hardened ferro-fluid shield formed inside the chip package over a structure that includes the MRAM chip and the first soft-magnetic shield.

21. The chip package of claim 1 wherein the via is formed without corners.

22. The chip package of claim 1 wherein the first soft-magnetic shield is formed by two or more pieces of shield material juxtaposed to form the via.

23. The package of claim 1 wherein the first soft-magnetic shield is formed from a ferro-flu id.

24. The chip package of claim 23 wherein the ferro-fluid includes a polymer.

25. The chip package of claim 23 wherein the ferro-fluid includes oil, water, epoxy, silicone, or glue.

26. The chip package of claim 23 wherein the ferro-fluid is deposited as a flowing liquid and subsequently hardens.

27. The chip package of claim 25 wherein the ferro-fluid is hardened by heating or exposure to light.

28. The chip package of claim 1 further comprising a second soft-magnetic shield disposed inside the chip package adjacent to a second surface of the MRAM chip, the second surface being opposite to the first surface of the MRAM chip, a surface of the second soft-magnetic shield confronting the MRAM chip being larger than the second surface of the MRAM chip and extending beyond the MRAM chip on opposing sides.

29. The chip package of claim 28 wherein the second soft-magnetic shield has at least one via with at least one bonding wire passing through the via.

30. The chip package of claim 28 wherein the second soft-magnetic shield has a thickness greater than a thickness of the MRAM chip measured along a selected line passing through the second soft-magnetic shield and the MRAM chip.

50. The chip package of claim 28 wherein the second soft-magnetic shield has a thickness greater than a thickness of the MRAM chip measured along a selected line passing through the second soft-magnetic shield and the MRAM chip.

31. A package including:

an MRAM chip with a set of chip contact pads on a first surface of the MRAM chip;

a set of package contact pads disposed on a first exterior surface of the chip package;

a set of bonding wires connecting the chip contact pads to the chip package contact pads; and

a first soft-magnetic shield attached to the first exterior surface of the chip package, the first shield having vias corresponding to the package contact pads disposed on a first exterior surface of the chip package, the vias providing access for solder connection to the package contact pads.

32. The chip package of claim 31 wherein a surface of the first shield confronting the first exterior surface of the chip package is larger than the first surface of the MRAM chip and extends beyond the MRAM chip on opposing sides.

33. The chip package of claim 31 wherein the first soft-magnetic shield is a homogeneous material that is an alloy of Fe and/or Co and any of the following Ni, Mn, Ir, Mg, Al, Ta, Ti, Pt, Pd, Ru, Cr, Cu, Hf, Zr, Si, C, Ge, W, Nb, Nd, Zn, Au, Ag, Cu, Mo, V, Ru, O and N.

34. The chip package of claim 31 further comprising a second soft-magnetic shield magnetically-soft formed inside the chip package over the MRAM chip, the second soft-magnetic shield being formed from a ferro-fluid including magnetic particles.

35. The chip package of claim 34 wherein the second soft-magnetic shield includes magnetic particles in a non-magnetic matrix and wherein the non-magnetic matrix is a non-magnetic metal or alloy, polymer, oxide, carbide, nitride, silicide, carbonate, sulfate, or silicon.

36. The chip package of claim 34 wherein the ferro-fluid includes oil, water, epoxy, silicone, or glue.

37. The chip package of claim 34 wherein the ferro-fluid is deposited as a flowing liquid and subsequently hardens.

38. The chip package of claim 37 wherein the ferro-fluid is hardened by heating or exposure to light.

39. The chip package of claim 34 wherein the magnetic particles in the second soft-magnetic shield are composed of an alloy of Fe and/or Co and any of the following Ni, Mn, Ir, Mg, Al, Ta, Ti, Pt, Pd, Ru, Cr, Cu, Hf, Zr, Si, C, Ge, W, Nb, Nd, Zn, Au, Ag, Cu, Mo, V, Ru, O and N.

40. The chip package of claim 34 wherein the magnetic particles are ferromagnetic.

41. The chip package of claim 34 wherein the magnetic particles are ferri-magnetic.

42. The chip package of claim 34 wherein the magnetic particles are super-paramagnetic.

43. The chip package of claim 34 wherein magnetic particles have a particle size less than one hundred microns.

44. The chip package of claim 34 wherein the magnetic particles have an approximate particle size from 5 nm to 500 nm.

45. The chip package of claim 31 wherein the first soft-magnetic shield is laminated and includes layers of soft magnetic material separated by non-magnetic spacer layers.

46. The chip package of claim 31 wherein the first soft-magnetic shield includes at least one layer of metallic magnetic foil.

47. The chip package of claim 31 wherein the first soft-magnetic shield has a thickness equal to or greater than a thickness of the MRAM chip measured along a selected line passing through the first soft-magnetic shield and the MRAM chip.

48. The chip package of claim 31 further comprising a second soft-magnetic shield disposed inside the chip package adjacent to a second surface of the MRAM chip opposite to first surface the MRAM chip, a surface of the second soft-magnetic shield confronting the MRAM chip being larger than the second surface of the MRAM chip and extending beyond the MRAM chip on opposing sides.

49. The chip package of claim 31 wherein the vias are formed without corners.