TEST JIG AND SEMICONDUCTOR DEVICE TEST METHOD

• US 20140203829A1
• Filed: 03/20/2014
• Published: 07/24/2014
• Est. Priority Date: 10/04/2011
• Status: Abandoned Application

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Yamada, Hiroshi
• Application Number:
  US14/220,627
• Publication Number:
  US 20140203829A1
• Time in Patent Office: Days
• US Class Current: 324/750.08
• CPC Class Codes: G01R 1/0408 Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets G01R1/067 takes precedence; mass production testing systems G01R31/59; testing of connections G01R31/66; for testing printed circuit boards G01R31/2808
• CPC Class Codes: G01R 1/0466 concerning contact pieces or mechanical details, e.g. hinges or cams; Shielding
• CPC Class Codes: G01R 1/0483 Sockets for un-leaded IC's having matrix type contact fields, e.g. BGA or PGA devices; Sockets for unpackaged, naked chips for IC's with connecting points around the edges only G01R1/0433
• CPC Class Codes: G01R 1/07314 the body of the probe being perpendicular to test object, e.g. bed of nails or probe with bump contacts on a rigid support on an elastic support, e.g. a film, G01R1/0735
• CPC Class Codes: G01R 1/07371 using an intermediate card or back card with apertures through which the probes pass
• CPC Class Codes: G01R 31/26 Testing of individual semiconductor devices testing or measuring during manufacture or treatment H01L22/00; testing of photovoltaic devices H02S50/10
• CPC Class Codes: G01R 31/2863 Contacting devices, e.g. sockets, burn-in boards or mounting fixtures in general G01R1/04
• CPC Class Codes: G01R 31/2874 related to temperature

Abstract

The test jig includes: a package mounting plate on which a semiconductor device is placed; a plurality of penetrating holes provided in the package mounting plate; a socket portion in which a plurality of probe pins are disposed, the probe pins designed to come in contact with electrodes of the semiconductor device through the penetrating holes; and a gas injecting unit configured to inject gas to the package mounting plate through the socket portion. The test of the semiconductor device is performed with the gas injected from the gas injecting unit to the package mounting plate.

Claims

1. A test jig comprising:

a package mounting plate on which a semiconductor device is placed;

a plurality of penetrating holes provided in the package mounting plate;

a socket portion in which a plurality of probe pins are disposed, the probe pins designed to come in contact with electrodes of the semiconductor device through the plurality of penetrating holes; and

a gas injecting unit configured to inject gas to the package mounting plate through the socket portion.

2. The test jig according to claim 1, wherein the package mounting plate is made of metal.

3. The test jig according to claim 1, wherein the socket portion is formed by combining an insulating member in contact with the probe pins and a metal member out of contact with the probe pins.

4. The test jig according to claim 1, wherein the package mounting plate is provided with a heater or a Peltier element.

5. The test jig according to claim 1, wherein the package mounting plate is provided with a heating medium flow passage through which a heating medium flows.

6. The test jig according to claim 2, wherein the package mounting plate is provided with a connection terminal designed to come in contact with a specific electrode out of the electrodes of the semiconductor device.

7. The test jig according to claim 1, wherein the package mounting plate is provided with a hole configured to guide the gas injected from the gas injecting unit to the semiconductor device.

8. The test jig according to claim 1, wherein the socket portion is provided with a damper configured to be opened and closed by wind pressure of the gas injected from the gas injecting unit.

9. A semiconductor device test method of testing a semiconductor device by:

placing the semiconductor device on a test jig in which a probe pin is installed; and

supplying a signal from a controller to the semiconductor device via the probe pin, wherein

the test jig comprises;

a package mounting plate on which the semiconductor device is placed;

a penetrating hole provided in the package mounting plate and allowing insertion of a front end portion of the probe pin;

a socket portion in which the probe pin is disposed; and

a gas injecting unit configured to inject gas, and

the method comprises testing the semiconductor device while injecting the gas from the gas injecting unit to the package mounting plate through the socket portion.

10. The semiconductor device test method according to claim 9, wherein a heat sink is attached to a surface of the semiconductor device on an opposite side to a package mounting plate and the heat sink is cooled by an air blowing fan.

11. The semiconductor device test method according to claim 10, wherein the controller controls the air blowing fan and injection of the gas from the gas injecting unit, according to a temperature of the semiconductor device.

12. The semiconductor device test method according to claim 11, wherein the controller controls the air blowing fan at intervals of a first time period, and controls the injection of the gas from the gas injecting unit at intervals of a second time period being shorter than the first time period.

13. The semiconductor device test method according to claim 9, wherein the package mounting plate is made of metal.

14. The semiconductor device test method according to claim 9, wherein the socket portion is formed by combining an insulating member in contact with the probe pin and a metal member out of contact with the probe pin.

15. The semiconductor device test method according to claim 9, wherein the package mounting plate is provided with a connection terminal designed to come in contact with a specific electrode out of electrodes of the semiconductor device.