INK LEVEL SENSOR AND RELATED METHODS

• US 20140204148A1
• Filed: 06/27/2011
• Published: 07/24/2014
• Est. Priority Date: 06/27/2011
• Status: Active Grant

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: George H. Corrigan III
• Inventors: Ge, Ning, Benjamin, Trudy, Neo, Teck-Khim, Torgerson, Joseph M., Banerjee, Neel, Corrigan, George H. III
• Granted Patent: US 9,599,500 B2
• Time in Patent Office: Days
• US Class Current: 347/19
• CPC Class Codes: B41J 2/14153 Structures including a sensor
• CPC Class Codes: B41J 2/175 Ink supply systems ; Circuit parts therefor
• CPC Class Codes: B41J 2/17566 Ink level or ink residue control
• CPC Class Codes: B41J 2002/17579 Measuring electrical impedance for ink level indication
• CPC Class Codes: G01F 23/263 by measuring variations in capacitance of capacitors

Abstract

In an embodiment, a method of sensing an ink level includes applying a pre-charge voltage Vp to a sense capacitor to charge the sense capacitor with a charge Q1, sharing Q1 between the sense capacitor and a reference capacitor, causing a reference voltage Vg at the gate of an evaluation transistor, and determining a resistance from drain to source of the evaluation transistor that results from Vg.

Claims

1. An ink level sensor comprising:

a sense capacitor whose capacitance changes with a level of ink in a chamber;

a switch T2 to apply a voltage Vp to the sense capacitor, placing a charge on the sense capacitor;

a switch T3 to share the charge between the sense capacitor and a reference capacitor, resulting in a reference voltage Vg; and

an evaluation transistor configured to provide a drain to source resistance in proportion to the reference voltage.

2. An ink level sensor as in claim 1, wherein the sense capacitor comprises:

a metal plate;

a passivation layer over the metal plate; and

substance within a chamber above the passivation layer.

3. An ink level sensor as in claim 2, wherein the substance is selected from the group consisting of ink, ink and air, and air.

4. An ink level sensor as in claim 1, wherein the reference capacitor comprises gate capacitance of the evaluation transistor.

21. An ink level sensor as in claim 1, further comprising a sense structure that includes the sense capacitor, the chamber, a nozzle, a metal plate firing element disposed within the fluid chamber, a passivation layer over the firing element, and an insulating layer on a silicon substrate.

22. An ink level sensor as in claim 1, further comprising a clearing resistor to purge ink residue from the chamber.

23. An ink level sensor as in claim 2, wherein the metal plate comprises a resistor firing element.

24. An ink level sensor as in claim 2, further comprising a parasitic elimination element to eliminate a parasitic capacitance formed under the metal plate.

25. An ink level sensor as in claim 24, wherein the parasitic elimination element comprises a conductive poly silicon layer.

5-20. -20. (canceled)

26. An ink level sensor comprising:

a sense capacitor between a node M1 and ground;

a switch T2 to couple a voltage Vp to M1 and charge the sense capacitor;

a switch T3 to couple M1 with a node M2 and share the charge between the sense capacitor and a reference capacitor, causing a voltage Vg at M2;

a transistor T4 having a drain, a gate coupled to M2, and a source coupled to ground, the transistor T4 to provide a drain to source resistance in proportion to Vg.

27. An ink level sensor as in claim 26, wherein the drain is coupled to a current source.

28. An ink level sensor as in claim 26, further comprising a switch T1 to couple M1 and M2 to ground to discharge the sense capacitor and the reference capacitor prior to coupling Vp to M1.

29. An ink level sensor as in claim 26, further comprising a node Mp coupled to Vp through T2 to prevent a parasitic capacitance between Mp and M1 from charging.

30. A printhead-integrated ink level sensor comprising:

a sense structure in fluid communication with a fluid slot, the structure including a fluid chamber and a sense capacitor within the chamber; and

a sensor circuit including a switch T2 to apply a voltage Vp to the sense capacitor, a switch T3 to produce a reference voltage Vg at a reference capacitor by sharing a charge between the sense capacitor and the reference capacitor, and a transistor to provide a drain to source resistance in proportion to the reference voltage.

31. An ink level sensor as in claim 30, wherein the sensor circuit comprises a switch T1 to couple the sense capacitor and the reference capacitor to ground to discharge the sense capacitor and the reference capacitor prior to switch T2 applying Vp to the sense capacitor.

32. An ink level sensor as in claim 30, wherein the sense capacitor comprises a metal plate, the ink level sensor further comprising a parasitic elimination circuit to eliminate a parasitic capacitance underneath the metal plate.

33. An ink level sensor as in claim 32, wherein the parasitic elimination circuit comprises a conductive poly silicon layer.