RECEIVE CIRCUIT FOR USE IN A POWER CONVERTER

• US 20140204626A1
• Filed: 01/22/2013
• Published: 07/24/2014
• Est. Priority Date: 01/22/2013
• Status: Active Grant

• Current Assignee: Power Integrations Incorporated
• Original Assignee: Power Integrations Incorporated
• Inventors: Djenguerian, Alex B., Liu, Sheng, Lund, Leif
• Granted Patent: US 9,276,479 B2
• Time in Patent Office: Days
• US Class Current: 363/21.14
• CPC Class Codes: H02M 3/335 using semiconductor devices only
• CPC Class Codes: H02M 3/33592 having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
• CPC Class Codes: H03G 1/00 Details of arrangements for controlling amplification
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A receive circuit for use in a power converter controller includes a first amplifier coupled to receive an input pulse. A second amplifier is coupled to a first output of the first amplifier. The first output is coupled to be responsive to the input pulse and to a second output of the second amplifier. An output circuit is coupled to generate an output signal in response to the second output.

Claims

1. A receive circuit for use in a power converter controller, comprising:

a first amplifier coupled to receive an input pulse;

a second amplifier coupled to a first output of the first amplifier, wherein the first output is coupled to be responsive to the input pulse and to a second output of the second amplifier;

an output circuit coupled to generate an output signal in response to the second output;

a first pre-bias circuit coupled to reset the first output to a first value in response to the output signal; and

a second pre-bias circuit coupled to reset the second output to a second value in response to the output signal.

2. The receive circuit of claim 1 further comprising a delay circuit coupled to receive the output signal, wherein the delay circuit is coupled to generate a pre-bias control signal responsive to the output signal, and wherein the delay circuit is coupled to the first pre-bias circuit and the second pre-bias circuit.

3. The receive circuit of claim 2, wherein the delay circuit is coupled to generate a pulse of the pre-bias control signal that is delayed from a corresponding pulse of the output signal by at least a pulse width of the input pulse.

4. The controller of claim 2, wherein the delay circuitry includes a current source coupled to a capacitor.

5. The receive circuit of claim 1, wherein the first pre-bias circuit includes a first switch coupled to reset the first output to the first value.

6. The receive circuit of claim 1, wherein the second pre-bias circuit includes a second switch coupled to reset the second output to the second value.

7. The receive circuit of claim 1, wherein the second amplifier includes a second amplifier switch coupled to be controlled by the first output of the first amplifier, and wherein the first value is just below a turn-on value of the second amplifier switch.

8. The controller of claim 1, wherein the first amplifier includes a differential amplifier having a first transistor and a second transistor coupled together at their bases, wherein the first transistor receives the input pulse at an emitter of the first transistor.

9. The controller of claim 1, wherein the output circuit includes an inverter coupled to compare the output of the second amplifier to a threshold voltage, the inverter further coupled to output the output signal.

10. A power converter, comprising:

an energy transfer element;

a switch coupled to the energy transfer element and coupled to an input of the power converter; and

a controller circuit coupled to control switching of the switch to control a transfer of energy through the energy transfer element from the input of the power converter to an output of the power converter, the controller circuit including a receive circuit including;

a first amplifier coupled to receive an input pulse;

a second amplifier coupled to a first output of the first amplifier, wherein the first output is coupled to be responsive to the input pulse and to a second output of the second amplifier; and

an output circuit coupled to generate an output signal in response to the second output.

11. The power converter of claim 10 further comprising a magnetically coupled communication link coupled between a primary side of the power converter and a secondary side of the power converter, wherein the first amplifier is coupled to receive the input pulse via the magnetically coupled communication link.

12. The power converter of claim 10, wherein the switch is coupled to be responsive to the output signal.

13. The power converter of claim 10, wherein the receive circuit further comprises:

a first pre-bias circuit coupled to reset the first output to a first value in response to the output signal; and

a second pre-bias circuit coupled to reset a second output of the second amplifier to a second value in response to the output signal.

14. The power converter of claim 13 further comprising a delay circuit coupled to receive the output signal, wherein the delay circuit is coupled to generate a pre-bias control signal responsive to the output signal, and wherein the delay circuit is coupled to the first pre-bias circuit and the second pre-bias circuit.

15. The power converter of claim 14, wherein the delay circuit is coupled to generate a pulse of the pre-bias control signal that is delayed from a corresponding pulse of the output signal by at least a pulse width of the input pulse.

16. The power converter of claim 13, wherein the first pre-bias circuit includes a first switch coupled to reset the first output to the first value.

17. The power converter of claim 13, wherein the second pre-bias circuit includes a second switch coupled to reset the second output to the second value.

18. The power converter of claim 10, wherein the second amplifier includes a second amplifier switch coupled to be controlled by the first output of the first amplifier, and wherein, in the absence of the input pulse in the receiver circuit, a first value of the first output is just below a turn-on value of the second amplifier switch.

19. The power converter of claim 10, wherein the first amplifier includes a differential amplifier having a first transistor and a second transistor coupled together at their bases, wherein the first transistor receives the input pulse at an emitter of the first transistor.

20. The power converter of claim 10, wherein the output circuit includes an inverter coupled to compare the output of the second amplifier to a threshold voltage, the inverter further coupled to output the output signal.

21. The power converter of claim 10, wherein the receive circuit is coupled to receive the input pulse from a transmitter, wherein the receive circuit is disposed on a separate semiconductor die.

22. The power converter of claim 21, wherein the receive circuit is disposed on a first die and the transmitter is disposed on a second die, and wherein the first die is disposed on a primary side of the power converter and the transmitter is disposed on a secondary side of the power converter.