VECTOR GALOIS FIELD MULTIPLY SUM AND ACCUMULATE INSTRUCTION
First Claim
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1. A computer program product for executing a machine instruction in a central processing unit, the computer program product comprising:
- a computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising;
obtaining, by a processor, a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising;
at least one opcode field to provide an opcode, the opcode identifying a Vector Galois Field Multiply Sum and Accumulate operation;
a first register field to be used to designate a first register, the first register comprising a first operand;
a second register field to be used to designate a second register, the second register comprising a second operand;
a third register field to be used to designate a third register, the third register comprising a third operand;
a fourth register field to be used to designate a fourth register, the fourth register comprising a fourth operand; and
executing the machine instruction, the executing comprising;
multiplying one or more elements of the second operand with one or more elements of the third operand using carryless multiplication to obtain a plurality of products;
performing a first mathematical operation on the plurality of products to obtain a first result;
performing a second mathematical operation on the first result and one or more selected elements of the fourth operand to obtain a second result; and
placing the second result in the first operand.
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Abstract
A Vector Galois Field Multiply Sum and Accumulate instruction. Each element of a second operand of the instruction is multiplied in a Galois field with the corresponding element of the third operand to provide one or more products. The one or more products are exclusively ORed with each other and exclusively ORed with a corresponding element of a fourth operand of the instruction. The results are placed in a selected operand.
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Citations
20 Claims
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1. A computer program product for executing a machine instruction in a central processing unit, the computer program product comprising:
a computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising; obtaining, by a processor, a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising; at least one opcode field to provide an opcode, the opcode identifying a Vector Galois Field Multiply Sum and Accumulate operation; a first register field to be used to designate a first register, the first register comprising a first operand; a second register field to be used to designate a second register, the second register comprising a second operand; a third register field to be used to designate a third register, the third register comprising a third operand; a fourth register field to be used to designate a fourth register, the fourth register comprising a fourth operand; and executing the machine instruction, the executing comprising; multiplying one or more elements of the second operand with one or more elements of the third operand using carryless multiplication to obtain a plurality of products; performing a first mathematical operation on the plurality of products to obtain a first result; performing a second mathematical operation on the first result and one or more selected elements of the fourth operand to obtain a second result; and placing the second result in the first operand. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A computer system for executing a machine instruction in a central processing unit, the computer system comprising:
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a memory; and a processor in communications with the memory, wherein the computer system is configured to perform a method, said method comprising; obtaining, by a processor, a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising; at least one opcode field to provide an opcode, the opcode identifying a Vector Galois Field Multiply Sum and Accumulate operation; a first register field to be used to designate a first register, the first register comprising a first operand; a second register field to be used to designate a second register, the second register comprising a second operand; a third register field to be used to designate a third register, the third register comprising a third operand; a fourth register field to be used to designate a fourth register, the fourth register comprising a fourth operand; and executing the machine instruction, the executing comprising; multiplying one or more elements of the second operand with one or more elements of the third operand using carryless multiplication to obtain a plurality of products; performing a first mathematical operation on the plurality of products to obtain a first result; performing a second mathematical operation on the first result and one or more selected elements of the fourth operand to obtain a second result; and placing the second result in the first operand. - View Dependent Claims (12, 13, 14, 15, 16, 17)
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18. A method for executing a machine instruction in a central processing unit, the method comprising:
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obtaining, by a processor, a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising; at least one opcode field to provide an opcode, the opcode identifying a Vector Galois Field Multiply Sum and Accumulate operation; a first register field to be used to designate a first register, the first register comprising a first operand; a second register field to be used to designate a second register, the second register comprising a second operand; a third register field to be used to designate a third register, the third register comprising a third operand; a fourth register field to be used to designate a fourth register, the fourth register comprising a fourth operand; and executing the machine instruction, the executing comprising; multiplying one or more elements of the second operand with one or more elements of the third operand using carryless multiplication to obtain a plurality of products; performing a first mathematical operation on the plurality of products to obtain a first result; performing a second mathematical operation on the first result and one or more selected elements of the fourth operand to obtain a second result; and placing the second result in the first operand. - View Dependent Claims (19, 20)
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Specification