POWER ELECTRONICS INTERCONNECTION FOR ELECTRIC MOTOR DRIVES

• US 20140209344A1
• Filed: 02/24/2014
• Published: 07/31/2014
• Est. Priority Date: 05/31/2011
• Status: Active Grant

• Current Assignee: Tesla Inc.
• Original Assignee: Tesla Motors Incorporated (Tesla Inc.)
• Inventors: Ferguson, Joshua Willard, Chi, William T., KALAYJIAN, Nicholas R., Dettmann, Benjamin D., Kroeze, Ryan C., Kubba, Michael R.
• Granted Patent: US 9,257,825 B2
• Time in Patent Office: Days
• US Class Current: 174/68.2
• CPC Class Codes: H01B 13/0036 Details
• CPC Class Codes: H01G 9/26 Structural combinations of electrolytic capacitors, rectifiers, detectors, switching devices, light-sensitive or temperature-sensitive devices with each other
• CPC Class Codes: H02G 5/00 Installations of bus-bars
• CPC Class Codes: H02G 5/005 Laminated bus-bars
• CPC Class Codes: H02M 7/003 Constructional details, e.g. physical layout, assembly, wiring or busbar connections
• CPC Class Codes: H05K 7/1432 specially adapted for power drive units or power converters
• CPC Class Codes: H05K 7/14329 specially adapted for the configuration of power bus bars
• CPC Class Codes: Y02T 10/70 Energy storage systems for electromobility, e.g. batteries
• CPC Class Codes: Y10T 29/4913 Assembling to base an electrical component, e.g., capacitor, etc.
• CPC Class Codes: Y10T 29/49174 Assembling terminal to elongated conductor
• CPC Class Codes: Y10T 29/49224 with coating

Abstract

The bus bar includes a first bus bar layer formed of a first generally uniform thickness of a first bus bar conductor; a first dielectric layer overlying a top surface of the first bus bar layer; and a second bus bar layer formed of a second generally uniform thickness of a second bus bar conductor overlying a top surface of the first dielectric layer and the top surface of the first bus bar layer wherein: the first bus bar layer includes a first via for receipt of a first electrical lead of an electrical component and a second via for receipt of a second electrical lead of the electrical component and wherein: the first dielectric layer and the second bus bar layer each include a via aligned with the first via wherein the first electrical lead is extendable from beneath the first bus bar layer through the first dielectric layer and through the second bus bar layer.

Claims

1-64. -64. (canceled)

65. A bus bar comprising:

a first bus bar layer formed of a first generally uniform thickness of a first bus bar conductor;

a first dielectric layer overlying a top surface of said first bus bar layer; and

a second bus bar layer formed of a second generally uniform thickness of a second bus bar conductor overlying a top surface of said first dielectric layer and said top surface of said first bus bar layer, wherein;

said first bus bar layer includes a first via for receipt of a first electrical lead of a first electrical component and a second via for receipt of a second electrical lead of said electrical component;

said first dielectric layer and said second bus bar layer each include a via aligned with said first via wherein said first electrical lead is extendable from beneath said first bus bar layer through said first dielectric layer and through said second bus bar layer;

said second bus bar layer includes a first plurality of electrically conductive mounting tabs formed from said second bus bar layer and extending generally perpendicular to said second bus bar layer and extending away from said first bus bar layer and wherein said first bus bar layer includes a second plurality of electrically conductive mounting tabs formed from said first bus bar layer and extending generally perpendicular to said first bus bar layer and through apertures in said first dielectric layer and said second bus bar layer, with said first and second plurality of electrically conductive mounting tabs extending about an equal distance from a top surface of said second bus bar layer;

said first and second plurality of electrically conductive mounting tabs each include a mounting slot extending generally perpendicular to said second bus bar layer; and

each said mounting slot is sized for receiving a respective first and second plurality of connection studs of a DC-Link capacitor of a high-power converter, with said mounting tabs mechanically and electrically supporting said DC-Link capacitor when mounted into said mounting slots using said plurality of connection studs wherein said DC-Link capacitor includes said first plurality of connection studs having a first polarity coupled to said first plurality of electrically conductive mounting tabs and said second plurality of connection studs having a second polarity coupled to said second plurality of electrically conductive mounting tabs.

66. The bus bar of claim 65 wherein the DC-Link capacitor includes said first plurality of connection studs and said second plurality of connection studs, with said first plurality of connection studs mechanically secured to and electrically communicated to said first plurality of mounting tabs and said second plurality of connection studs mechanically secured to and electrically communicated to said second plurality of mounting tabs, and further comprising a second electrical component coupled to a surface of said first bus bar layer not coupled to said first dielectric layer and including said first electrical lead extending through said vias of said first and second bus bar layers and including said second electrical lead extending through said second via of said first bus bar layer, wherein said first electrical lead is electrically fused to said via of said second bus bar layer and wherein said second electrical lead is electrically fused to said second via of said first bus bar layer, wherein said first electrical lead is coupled by said second bus bar layer to said first plurality of connection studs and wherein said second electrical lead is coupled by said first bus bar layer to said second plurality of connection studs.

67. The bus bar of claim 66 further comprising a first plurality of connection couplers engaged with said first plurality of connection studs and a second plurality of connection couplers engaged with said second plurality of connection studs when said DC-Link capacitor is unmounted from said first and second pluralities of electrically conductive mounting tabs and wherein said first and second pluralities of connection couplers are biased away from a body of said DC-Link capacitor by a biasing structure to maintain an installation distance between said connection couplers and said body sufficient to permit said DC-Link capacitor to be mounted into said mounting tabs with said connection couplers installed and without interference of said connection couplers with said mounting tabs when said DC-Link capacitor is installed.

68. The bus bar of claim 67 wherein said biasing structure includes a first wave spring coupled to said first plurality of connection studs and a second wave spring coupled to said second plurality of connection studs.

69. The bus bar of claim 65 wherein a first portion of said first bus bar layer includes said second via and wherein said second bus bar layer does not overlay said first portion of said first bus bar layer.

70. The bus bar of claim 65 wherein said via of said second bus bar layer includes a first electrical communication tab formed from said second bus bar layer and interacting with said first electrical lead when it extends into said via of said second bus bar layer.

71. The bus bar of claim 70 wherein said first electrical communication tab includes a first tab portion extending generally parallel to a longitudinal axis of a portion of said first electrical lead extending through said via of said second bus bar layer, said first tab portion extending above a surface of said second bus bar layer away from said first bus bar layer.

72. The bus bar of claim 71 wherein said first tab portion extends from a periphery of said via of said second bus bar layer towards a center of said via of said second bus bar layer.

73. The bus bar of claim 72 further comprising a second tab portion starting at a point on said periphery and extending towards said center.

74. The bus bar of claim 70 wherein said second via of said first bus bar layer includes a second electrical communication tab formed from said first bus bar layer and interacting with said second electrical lead when it extends into said second via of said first bus bar layer.

75. The bus bar of claim 65 further comprising a second dielectric layer overlying said second bus bar layer, and a printed circuit board assembly (PCBA) overlying said second dielectric layer, wherein said second dielectric layer and said PCBA each include a via aligned with said first via, wherein said first electrical lead is extendable from beneath said first bus bar layer through said dielectric layers, through said second bus bar layer and into and through said PCBA.

76. The bus bar of claim 75 wherein said PCBA includes a bus bar connection via and further comprising a bus bar layer connection tab formed from a portion of one of said first and second bus bar layers with said bus bar layer connection tab engaging said bus bar connection via when said PCBA overlies said first and second bus bar layers.

77. The bus bar of claim 75 wherein said PCBA includes a second via aligned with said second via of said first bus bar layer wherein said second electrical lead is extendable from beneath said first bus bar layer through said first dielectric layer and said PCBA.

78. The bus bar of claim 77 wherein said PCBA includes a bus bar connection via and further comprising a bus bar layer connection tab formed from a portion of one of said first and second bus bar layers with said bus bar layer connection tab engaging said bus bar connection via when said PCBA overlies said first and second bus bar layers.

79. A method comprising:

a) forming a first bus bar layer into a desired three-dimensional form factor, said first bus bar layer formed of a first generally uniform thickness of a first bus bar conductor;

b) overlaying a first dielectric layer over a top surface of said first bus bar layer;

c) forming a second bus bar layer conforming to said desired three-dimensional form factor, said second bus bar layer formed of a second generally uniform thickness of a second bus bar conductor overlying a top surface of said first dielectric layer and said top surface of said first bus bar layer, wherein;

said first bus bar layer includes a first via for receipt of a first electrical lead of a first electrical component and a second via for receipt of a second electrical lead of said electrical component;

said first dielectric layer and said second bus bar layer each include a via aligned with said first via wherein said first electrical lead is extendable from beneath said first bus bar layer through said first dielectric layer and through said second bus bar layer;

d) forming a first plurality of electrically conductive mounting tabs from said second bus bar layer with said first plurality of electrically conductive mounting tabs extending generally perpendicular to said second bus bar layer and extending away from said first bus bar layer;

e) forming a second plurality of electrically conductive mounting tabs from said first bus bar layer with said second plurality of electrically conductive mounting tabs extending generally perpendicular to said first bus bar layer and extending through a second plurality of apertures in both said first dielectric layer and said second bus bar layer, wherein;

said first and second plurality of electrically conductive mounting tabs extend about an equal distance away from a top surface of said second bus bar layer;

said first and second plurality of electrically conductive mounting tabs each include a mounting slot extending generally perpendicular to said second bus bar layer;

each said mounting slot is sized for receiving a respective first and second plurality of connection studs of a DC-Link capacitor of a high-power converter, with said mounting tabs mechanically and electrically supporting said DC-Link capacitor when mounted into said mounting slots using said plurality of connection studs;

f) mounting the first plurality of connection studs of said DC-Link capacitor having a first polarity to said first plurality of electrically conductive mounting tabs; and

g) mounting the second plurality of connection studs of said DC-Link capacitor having a second polarity to said second plurality of electrically conductive mounting tabs.

80. The method of claim 79 further comprising:

h) coupling a second electrical component to a surface of said first bus bar layer opposite a surface coupled to said dielectric layer;

i) extending said first lead through both said first via of said first bus bar layer and said via of said second bus bar layer; and

j) extending said second electrical lead through said second via of said first bus bar layer.

81. The method of claim 79 further comprising:

h) engaging, when said DC-Link capacitor is unmounted from said first and second pluralities of electrically conductive mounting tabs, a first plurality of connection couplers with said first plurality of connection studs and a second plurality of connection couplers with said second plurality of connection studs; and

i) biasing said pluralities of connection couplers away from a body of said DC-Link capacitor to maintain an installation distance between said connection couplers and said body sufficient to permit said DC-Link capacitor to be mounted into said mounting tabs with said connection couplers installed without interference between said connection couplers and said mounting tabs.

82. The method of claim 81 wherein said biasing uses a biasing structure and wherein said biasing structure includes a first wave spring coupled to said first plurality of connection studs and a second wave spring coupled to said second plurality of connection studs.

83. The method of claim 79 wherein a first portion of said first bus bar layer includes said second via and wherein said second bus bar layer does not overlay said first portion of said first bus bar layer.

84. The method of claim 79 further comprising overlaying a second dielectric layer over said second bus bar layer, and a printed circuit board assembly (PCBA) over said second dielectric layer, wherein said second dielectric layer and said PCBA each include a via aligned with said first via, wherein said first electrical lead is extendable from beneath said first bus bar layer through said dielectric layers, through said second bus bar layer and into and through said PCBA.