DEGRADATION DIAGNOSING CIRCUIT AND DEGRADATION DIAGNOSING METHOD

• US 20140218060A1
• Filed: 08/15/2012
• Published: 08/07/2014
• Est. Priority Date: 08/24/2011
• Status: Abandoned Application

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Saneyoshi, Eisuke
• Application Number:
  US14/240,024
• Publication Number:
  US 20140218060A1
• Time in Patent Office: Days
• US Class Current: 324/750.3
• CPC Class Codes: G01R 31/30 Marginal testing, e.g. by varying supply voltage testing computers during standby operation or idle time G06F11/22
• CPC Class Codes: G01R 31/3187 Built-in tests

Abstract

In order to measure a state of degradation of a semiconductor integrated circuit more correctly by use of a simple configuration, a degradation diagnosing circuit includes: a test block including a first circuit which is an object of a degradation diagnosis; a reference block including a second circuit which has a configuration identical with a configuration of the first circuit; a judgment unit that judges whether a component of the test block is degraded or not by comparing a characteristic of a first signal outputted from the test block, and a characteristic of a second signal outputted from the reference block, in the case in which a signal indicating a measurement mode is inputted; and a control unit that outputs the signal which indicates the measurement mode to the judgment unit.

Claims

1. A degradation diagnosing circuit, comprising:

a test block including a first circuit which is an object of a degradation diagnosis;

a reference block including a second circuit which has a configuration identical with a configuration of the first circuit;

a judgment unit that judges whether a component of the test block is degraded or not by comparing a first characteristic of a first signal outputted from the test block, and a second characteristic of a second signal outputted from the reference block, in the case in which a signal indicating a measurement mode is inputted; and

a control unit that outputs the signal which indicates the measurement mode to the judgment unit.

2. The degradation diagnosing circuit according to claim 1, wherein

the first characteristic and the second characteristic are electric characteristics which the first signal and the second signal have respectively and which are changed as a result of the degradation.

3. The degradation diagnosing circuit according to claim 1, comprising:

a characteristics adjusting unit that carries out a predetermined adjustment to at least one of the first signal and the second signal according to a direction of the judgment unit so that the first characteristic and the second characteristic may be identical each other, in the case in which the signal indicating the measurement mode is inputted, wherein

the judgment unit judges whether the degradation is caused or not on the basis of necessity of the direction.

4. The degradation diagnosing circuit according to claim 3, wherein

the judgment unit outputs an amount of adjustment necessary to carry out the adjustment as an amount of degradation which indicates a degree of the degradation.

5. The degradation diagnosing circuit according to claim 1, wherein

the judgment unit comprises:

a frequency divider to output a third signal whose frequency is a divided frequency of the first signal;

a latch circuit to latch a fourth signal and a fifth signal which have amounts of delay different each other from the second signal by use of the third signal and to output the latched fourth signal and the latch fifth signal;

an EXOR (exclusive-OR) circuit to carry out the exclusive-or operation to the outputs of the latch circuit; and

an degradation amount calculating unit that calculates an amount of the degradation on the basis of the output of the EXOR circuit.

6. The degradation diagnosing circuit according to claim 5, wherein

the fourth signal and the fifth signal are generated by making the second signal delayed.

7. The degradation diagnosing circuit according to claim 5, wherein

the fourth signal and the fifth signal are the second signals outputted from positions corresponding to a preceding stage and a following stage respectively on a predetermined signal transmission path in the reference block.

8. The degradation diagnosing circuit according to claim 1, wherein

in the case in which the control unit does not output the signal which indicates the measurement mode, the test block operates and the reference block stops an operation.

9. The degradation diagnosing circuit according to claim 1, wherein

the test block and the reference block operate in an operational environment in which stresses different each other are applied to the test block and the reference block respectively.

11. A semiconductor integrated circuit device comprising the degradation diagnosing circuit according to claim 1.

10. A degradation diagnosing method, comprising

judging whether a component of a test block which includes a first circuit which is an object of a degradation diagnosis is degraded or not by comparing first characteristic of a first signal outputted from the test block, and second characteristic of a second signal outputted from a reference block including a second circuit which has a configuration identical with a configuration of the first circuit, in the case in which a signal indicating a measurement mode is inputted.

12. A degradation diagnosing circuit, comprising:

a test block including a first circuit which is an object of a degradation diagnosis;

a reference block including a second circuit which has a configuration identical with a configuration of the first circuit;

a judgment means for judging whether a component of the test block is degraded or not by comparing first characteristic of a first signal outputted from the test block, and second characteristic of a second signal outputted from the reference block, in the case in which a signal indicating a measurement mode is inputted; and

a control means for outputting the signal which indicates the measurement mode to the judgment means.