CMOS ULTRASONIC TRANSDUCERS AND RELATED APPARATUS AND METHODS

• US 20140219062A1
• Filed: 02/04/2014
• Published: 08/07/2014
• Est. Priority Date: 02/05/2013
• Status: Active Grant

• Current Assignee: BFLY Operations, Inc. (Butterfly Network, Inc.)
• Original Assignee: Butterfly Network, Inc.
• Inventors: Rothberg, Jonathan M., Fife, Keith G., Ralston, Tyler S., Charvat, Gregory L., Sanchez, Nevada J.
• Granted Patent: US 9,533,873 B2
• Time in Patent Office: Days
• US Class Current: 367/135
• CPC Class Codes: B06B 1/02 making use of electrical energy B06B1/18, B06B1/20 take precedence
• CPC Class Codes: B06B 1/0292 Electrostatic transducers, e.g. electret-type
• CPC Class Codes: B81B 2203/0127 Diaphragms, i.e. structures separating two media that can control the passage from one medium to another; Membranes, i.e. diaphragms with filtering function
• CPC Class Codes: B81B 2203/0315 Cavities
• CPC Class Codes: B81B 2207/015 the micromechanical device and the control or processing electronics being integrated on the same substrate
• CPC Class Codes: B81B 3/0021 Transducers for transforming electrical into mechanical energy or vice versa dynamo-electric machines H02K99/00; electrostatic machines H02N1/00; piezoelectric devices H10N30/00
• CPC Class Codes: B81B 7/0077 Other packages not provided for in groups B81B7/0035 - B81B7/0074
• CPC Class Codes: B81C 1/00158 Diaphragms, membranes manufacture process for semi-permeable inorganic membranes B01D67/0039
• CPC Class Codes: B81C 2201/013 Etching
• CPC Class Codes: B81C 2203/0118 Bonding a wafer on the substrate, i.e. where the cap consists of another wafer
• CPC Class Codes: B81C 2203/0735 Post-CMOS, i.e. forming the micromechanical structure after the CMOS circuit
• CPC Class Codes: B81C 2203/0771 Stacking the electronic processing unit and the micromechanical structure
• CPC Class Codes: G10K 11/18 Methods or devices for transmitting, conducting or directing sound G10K11/02, G10K11/36 take precedence
• CPC Class Codes: G10K 9/12 electrically operated

Abstract

CMOS Ultrasonic Transducers and processes for making such devices are described. The processes may include forming cavities on a first wafer and bonding the first wafer to a second wafer. The second wafer may be processed to form a membrane for the cavities. Electrical access to the cavities may be provided.

Claims

1. An apparatus, comprising:

a plurality of ultrasound sources comprising a first ultrasound source, a second ultrasound source, and a third ultrasound source, wherein at least one of the first ultrasound source, second ultrasound source, or third ultrasound source is a CMOS ultrasonic transducer (CUT) comprising a first wafer having a cavity formed therein and a membrane sealing the cavity;

a first ultrasound sensor and a second ultrasound sensor; and

processing circuitry coupled to the first ultrasound sensor and the second ultrasound sensor and configured to receive and discriminate between, for each of the first and second ultrasound sensors, respective source signals emitted by the first, second, and third ultrasound sources, wherein the first ultrasound source, second ultrasound source, and the first ultrasound sensor lie in a first plane, and

wherein the second ultrasound source, the third ultrasound source, and the first ultrasound sensor lie in a second plane different than the first plane.

2. The apparatus of claim 1, wherein the CUT comprises a plurality of cavities formed in the first wafer and sealed by the membrane.

3. The apparatus of claim 2, wherein the CUT comprises a plurality of cavities formed in the first wafer, at least two cavities of the plurality of cavities being sealed by respective membranes.

4. The apparatus of claim 1, wherein the first ultrasound sensor is a CUT comprising a first wafer having a plurality of cavities formed therein and a membrane sealing at least one of the cavities.

5. The apparatus of claim 4, wherein the first wafer of the CUT of the first ultrasound sensor comprises integrated circuitry forming at least part of the processing circuitry.

6. An apparatus, comprising:

a plurality of ultrasound elements formed on a support, wherein a first ultrasound element of the plurality of ultrasound elements comprises a first wafer having a plurality of cavities formed therein and at least one membrane overlying the plurality of cavities.

7. The apparatus of claim 6, wherein each of the plurality of ultrasound elements is formed by a first wafer having a respective plurality of cavities formed therein at least one membrane overlying the respective plurality of cavities.

8. An apparatus, comprising:

opposed arrays of ultrasound elements, wherein a first array of the opposed arrays comprises a first plurality of ultrasound elements, at least two of which comprise a plurality of CMOS ultrasonic transducers, and wherein a second array of the opposed arrays comprises a second plurality of ultrasound elements, at least two of which comprise a plurality of CMOS ultrasonic transducers.