SIGNAL CANCELLATION USING FEEDFORWARD AND FEEDBACK PATHS

• US 20140219139A1
• Filed: 02/04/2014
• Published: 08/07/2014
• Est. Priority Date: 02/04/2013
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Kumu Networks, Inc.
• Inventors: Jain, Mayank, Katti, Sachin, Levis, Philip, CHOI, Jung-il, Hong, Steven, Mehlman, Jeff
• Granted Patent: US 9,490,963 B2
• Time in Patent Office: Days
• US Class Current: 370/278
• CPC Class Codes: H04B 1/525 with means for reducing leakage of transmitter signal into the receiver
• CPC Class Codes: H04L 1/0036 arrangements specific to the receiver
• CPC Class Codes: H04L 5/1461 Suppression of signals in the return path, i.e. bidirectional control circuits

Abstract

A circuit that cancels a self-interference signal includes, in part, a pair of signal paths that are substantially in phase, each of which paths includes a passive coupler, a delay element and a variable attenuator. The circuit further includes, in part, a first group of P signal paths each of which is substantially in phase with the pair of paths, a second group of M signal paths each of which is substantially out-of-phase relative to the pair of signal paths, and at least a pair of feedback paths. Each of the P and M signal paths, as well as the feedback paths includes a delay element and a variable attenuator. Optionally, each of the M signal paths is optionally 180° out-of-phase relative to the pair of signal paths.

Claims

1. A circuit comprising:

a first signal path comprising a passive coupler, a delay element and a variable attenuator;

a second signal path comprising a passive coupler, a delay element and a variable attenuator, said second signal path being substantially in phase with the first signal path;

first P signal paths each being substantially in phase with the first and second signal paths, each of the first P signal paths comprising a delay element and a variable attenuator, each of (P−

1) of the first P signal paths comprising a passive coupler;

second M signal paths each being out-of-phase relative to the first and second signal paths, each of the second M signal paths comprising a delay element and a variable attenuator, each of (M−

1) of the second M signal paths comprising a passive coupler, and wherein a sum of M and P is an integer equal to or greater than one;

at least a first feedback path formed using an isolation port of the passive coupler disposed in the first signal path or an isolation port of a passive coupler disposed in a first one of the first P signal paths;

said at least first feedback path comprising a delay element and a variable attenuator; and

at least a second feedback path formed via an isolation port of the passive coupler disposed in the second signal path or an isolation port of a passive coupler disposed in a first one of the second M signal paths;

said at least second feedback path comprising a delay element and a variable attenuator;

2. The circuit of claim 1 further comprising:

at least one antenna for receiving or transmitting a signal.

3. The circuit of claim 2 wherein each of the first signal path, the second signal path, the first P signal paths and the second M signal paths is adapted to receive a sample of a transmit signal and generate a delayed and weighted sample of the transmit signal.

4. The circuit of claim 3 further comprising:

a control block adapted to vary an attenuation level of the variable attenuators disposed in the first signal path, the second signal path, the first P signal paths, the second M signal paths; and

the at least first and second feedback paths;

a combiner adapted to combine the delayed and weighted samples of the transmit signal to generate a first signal representative of a self-interference signal; and

a combiner/coupler adapted to subtract the first signal from a received signal.

5. The circuit of claim 4 wherein the delay element disposed in the first signal path generates a delay shorter than an arrival time of a second sample of the transmit signal at the combiner/coupler, and wherein the delay element disposed in the second signal path generates a delay longer than the arrival time of the second sample of the transmit signal at the combiner/coupler.

6. The circuit of claim 5 wherein the first signal path, the second signal path, the first P signal paths and the second M signal paths form P/2+M/2+1 associated pairs of paths, the delays generated by the delay elements of each associated pair of delay paths forming a window within which the second sample of the transmit signal arrives at the combiner/coupler.

7. The circuit of claim 6 further comprising a controller adapted to determine the attenuation levels of the variable attenuators disposed in the first signal path, the second signal path, the first P signal paths, the second M signal paths in accordance with values of intersections of an estimate of the self-interference signal and P+M+2 sinc functions centered at boundaries of the P/2+M/2+1 windows.

8. The circuit of claim 7 wherein a peak value of at least a subset of the P+M+2 sinc functions is set substantially equal to an amplitude of the estimate of the self-interference signal.

9. The circuit of claim 8 wherein said circuit further comprises:

a splitter adapted to generate the sample of the transmit signal from the transmit signal.

10. The circuit of claim 9 further comprising:

an isolator having a first port coupled to the antenna, a second port coupled to a transmit line of the circuit, and a third port coupled to a receive line of the circuit.

11. The circuit of claim 10 wherein said isolator is a circulator.

12. The circuit of claim 1 wherein the second M signal paths are substantially 180°

of-phase relative to the first and second signal paths.

13. The circuit of claim 1 further comprising a variable delay element.

14. The circuit of claim 1 further comprising at least one amplifier.

15. A method of reducing a self-interference signal, the method comprising:

delivering a first portion of a first sample of a transmit signal to a first passive coupler to generate a first through signal;

generating a first signal defined by a delayed and weighted sample of the first through signal;

delivering a second portion of the sample of the transmit signal to a second passive coupler to generate a second through signal;

generating a second signal defined by a delayed and weighted sample of the second through signal;

generating P signals each being substantially in phase with the first and second signals and each defined by a different delayed and weighted sample of either the first or the second through signals,

generating M signals each being substantially out-of-phase relative to the first and second signals and each defined by a different delayed and weighted sample of either the first or the second through signals,

generating at least a first feedback signal from the first signal or from a first one of the first P signal paths;

generating at least a second feedback signal from the second signal or from a first one of the M signals; and

combining the first signal, the second signal, the P signals, the M signals, the at least first feedback signal and the at least second feedback signal to generate a combined signal representative of the self-interference signal.

16. The method of claim 15 further comprising:

receiving a second sample of the transmit signal via an antenna;

combining/coupling the combined signal with the second sample of the transmit signal received via the antenna.

17. The method of claim 16 further comprising:

setting the delay of the first signal to a value less than an arrival time of the second sample of transmit signal at the antenna; and

setting the delay of the second signal to a value greater than the arrival time of the second sample of the transmit signal at the antenna.

18. The method of claim 17 further comprising:

forming P/2+M/2+1 associated time windows defined by the delays of the first signal, the second signal, the P signals, and the M signals; and

selecting the delays of the first signal, the second signal, the P signals, and the M signals such that the arrival time of the second sample of the transmit signal at the antenna falls within each of the P/2+M/2+1 time windows.

19. The method of claim 18 further comprising:

determining weights of the first and second signals in accordance with values of intersections of an estimate of the self-interference signal and P+M+2 sinc functions centered at boundaries of the P/2+M/2+1 time windows.

20. The method of claim 19 further comprising:

setting a peak value of at least a subset of the P+M+2 sinc functions substantially equal to an amplitude of the estimate of the self-interference signal.

21. The method of claim 20 further comprising:

receiving the first sample of the transmit signal from a splitter.

22. The method of claim 21 further comprising:

delivering a second portion of the transmit signal to an isolator; and

delivering the transmit signal from the isolator to the antenna.

23. The method of claim 22 wherein said isolator is a circulator.

24. The method of claim 15 further comprising:

generating the M signals such that each of the M signals is substantially 180°

out-of-phase relative to the first and second signals.

25. The method of claim 15 further comprising:

delaying the first sample of the transmit signal.

26. The method of claim 15 further comprising:

amplifying the first sample of the transmit signal.

27. The method of claim 15 further comprising:

amplifying the combined signal.

28. The method of claim 15 further comprising:

amplifying at least one of the first signal or the second signal.

29. The method of claim 15 further comprising:

amplifying at least one of the M signals.

30. The method of claim 29 further comprising:

amplifying at least one of the P signals.

31. A signal cancellation circuit comprising M feedback paths, and N feedforward paths each being either in-phase or out-of-phase relative to other (N−

1) signal paths, each of the M feedback and N feedforward signal paths comprising a passive coupler, a delay element and a variable attenuator, wherein M and N are integers greater than one.