ELECTRONIC DEVICE AND BOOTING METHOD THEREOF

• US 20140223161A1
• Filed: 12/19/2013
• Published: 08/07/2014
• Est. Priority Date: 02/01/2013
• Status: Abandoned Application

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: KIM, Hyoung-su
• Application Number:
  US14/133,930
• Publication Number:
  US 20140223161A1
• Time in Patent Office: Days
• US Class Current: 713/2
• CPC Class Codes: G06F 1/06 Clock generators producing several clock signals G06F1/08 - G06F1/14 take precedence
• CPC Class Codes: G06F 1/24 Resetting means
• CPC Class Codes: G06F 9/4401 Bootstrapping security arrangements therefor G06F21/57

Abstract

An electronic device includes: a clock divider configured to divide a received main clock signal and generate a plurality of divided clock signals; a storage configured to store booting data; and a controller which, upon supply of power, is configured to generate the main clock signal and output the main clock signal to the clock divider, and output a control signal to read the booting data based on the divided clock signals after a predetermine time for stabilizing the divided clock signals has elapsed.

Claims

1. An electronic device comprising:

a clock divider configured to receive a main clock signal and divide the received main clock signal and generate a plurality of divided clock signals;

a storage configured to store booting data; and

a controller which, upon supply of power, is configured to generate the main clock signal and output the main clock signal to the clock divider, and output a control signal to read the booting data based on the divided clock signals to the storage after a predetermined time for stabilizing the divided clock signals has elapsed.

2. The electronic device according to claim 1, wherein the control signal comprises a reset signal and a chip select signal.

3. The electronic device according to claim 1, wherein the predetermined time comprises hundreds of msec after the power is supplied.

4. The electronic device according to claim 1, wherein if a booting process to read the booting data ends in failure after a preset number of attempts, the controller enters a safety mode in which the booting process is suspended.

5. The electronic device according to claim 4, wherein the preset number of attempts is one of three and five.

6. The electronic device according to claim 1, further comprising a broadcasting receiver configured to receive a broadcasting signal.

7. A booting method of an electronic device comprising a clock divider to divide a received main clock signal to a plurality of divided clock signals, the booting method comprising:

generating by a controller the main clock signal and outputting the main clock signal to the clock divider upon supply of power;

outputting to a storage a control signal to read booting data based on the divided clock signals after a predetermined time for stabilizing the divided clock signals has elapsed; and

reading the booting data and performing a booting process.

8. The booting method according to claim 7, wherein the control signal comprises a reset signal and a chip select signal.

9. The booting method according to claim 7, wherein the predetermined time comprises hundreds of msec after the power is supplied.

10. The booting method according to claim 7, further comprising entering a safety mode in which the booting process is suspended if the booting process to read the booting data ends in failure after a preset number of attempts.

11. The booting method according to claim 10, wherein the preset number of attempts is one of three and five.

12. An electronic device comprising:

a clock divider configured to divide a received main clock signal to a plurality of divided clock signals;

a storage configured to store booting data; and

a controller, upon supply of power, configured to generate the main clock signal, output the main clock signal to the clock divider after a predetermined time for stabilizing the clock division has elapsed, and output a control signal to read the booting data based on the divided clock signals to the storage.

13. The electronic device according to claim 12, wherein the predetermined time comprises hundreds of msec after the power is supplied.

14. The electronic device according to claim 12, wherein if a booting process to read the booting data ends in failure after a preset number of attempts, the controller enters a safety mode in which the booting process is suspended.

15. The electronic device according to claim 14, wherein the preset number of attempts is one of three and five.