INTERFERENCE DETECTION

• US 20140225856A1
• Filed: 02/08/2013
• Published: 08/14/2014
• Est. Priority Date: 02/08/2013
• Status: Active Grant

• Current Assignee: Synaptics Incorporated
• Original Assignee: Synaptics Incorporated
• Inventors: Shepelev, Petr, Shahrokhi, Farzaneh, Ozbas, Murat, Dattalo, Tracy Scott
• Granted Patent: US 9,442,598 B2
• Time in Patent Office: Days
• US Class Current: 345/174
• CPC Class Codes: G06F 3/04182 Filtering of noise external to the device and not generated by digitiser components
• CPC Class Codes: G06F 3/044 by capacitive means
• CPC Class Codes: G06F 3/046 by electromagnetic means

Abstract

A method for detecting interference in an input device, the method involving: driving a transmitter signal onto a transmitter sensor electrode of the input device; receiving a resulting signal from a receiver sensor electrode of the input device; sampling a first value associated with the resulting signal during a first half of a sensing cycle; sampling a second value associated with the resulting signal during a second half of the sensing cycle; generating an interference value based on the first value and the second value; determining, based on the first value and the second value, an input in a sensing region of the input device; and comparing the interference value to a noise threshold.

Claims

1. A method for detecting interference in an input device, the method comprising:

driving a transmitter signal onto a transmitter sensor electrode of the input device;

receiving a resulting signal from a receiver sensor electrode of the input device;

sampling a first value associated with the resulting signal during a first half of a sensing cycle;

sampling a second value associated with the resulting signal during a second half of the sensing cycle;

generating an interference value based on the first value and the second value;

determining, based on the first value and the second value, an input in a sensing region of the input device; and

comparing the interference value to a noise threshold.

2. The method of claim 1,

wherein generating the interference value comprises subtracting the magnitudes of first value and the second value, and

wherein determining the input comprises summing the magnitudes of the first value and the second value.

3. The method of claim 1, further comprising:

issuing a flag in response to the interference value exceeding the noise threshold.

4. The method of claim 3, further comprising:

performing an interference avoidance action in response to the flag.

5. The method of claim 1, further comprising:

resetting accumulator circuitry associated with an amplifier at a start of the first half of the sensing cycle, wherein the accumulator circuitry accumulates the first value during the first half of the sensing cycle; and

resetting the accumulator circuitry at a start of the second half of the sensing cycle, wherein the accumulator circuitry accumulates the second value during the second half of the sensing cycle.

6. The method of claim 5, further comprising:

generating a comparison between a rail voltage range of the amplifier and at least one selected from a group consisting of the first value and the second value; and

issuing a flag in response to the comparison.

7. The method of claim 1, wherein the interference value is indicative of asymmetric noise.

8. The method of claim 1, wherein generating the interference value further comprises:

operatively connecting a first capacitor storing the first value and a second capacitor storing the second value.

9. The method of claim 1,

wherein the first half cycle corresponds to at least one selected from a group consisting of a positive polarity and a negative polarity, and

wherein the second half cycle has a polarity opposite the first half cycle.

10. The method of claim 1, wherein the first value and the second value are selected from a group consisting of current and voltage.

11. An input device configured to sense input objects in a sensing region, the input device comprising:

transmitter circuitry configured to drive a transmitter signal onto a transmitter sensor electrode of an input device,

wherein the transmitter signal comprises a transmitter waveform with repeating cycles, and

wherein each cycle comprises a transition;

receiver circuitry configured to receive a resulting signal from a receiver sensor electrode of the input device, the receiver circuitry comprising;

accumulator circuitry comprising an amplifier and configured to;

accumulate a first value of the resulting signal during a first half of a sensing cycle; and

accumulate a second value of the resulting signal during a second half of the sensing cycle;

demodulator circuitry configured to;

determine an input from the sensing region of the input device based on the first value and the second value; and

generate an interference value based on the first value and the second value; and

control circuitry comprising a first comparator and configured to;

generate, using the first comparator, a first comparison of the interference value and noise threshold.

12. The input device of claim 11,

wherein the interference value is generated by determining a difference in magnitudes of the first value and the second value, and

wherein the input is determined by a summation of the magnitudes of the first value and the second value.

13. The input device of claim 11, wherein the control circuitry is further configured to:

issue a flag for the input based on the first comparison.

14. The input device of claim 13, wherein the input device performs an interference avoidance action in response to the flag.

15. The input device of claim 11,

wherein the control circuitry further comprises a second comparator and is configured to:

generate, using the second comparator, a second comparison between a rail voltage range of the amplifier and at least one of the first value and the second value; and

issue a flag based on the second comparison.

16. The input device of claim 15, wherein the control circuitry further comprises an OR gate operatively connected to the first comparator and the second comparator, and wherein the OR gate outputs the flag.

17. The input device of claim 11, wherein the interference value is indicative of asymmetric noise.

18. The input device of claim 11, wherein the demodulator circuitry further comprises:

a first capacitor storing the first value and a second capacitor storing the second value.

19. The input device of claim 11,

wherein the first half cycle corresponds to at least one selected from a group consisting of a positive polarity and a negative polarity, and

wherein the second half cycle has a polarity opposite the first half cycle.

20. The input device of claim 11, wherein the first value and the second value are selected from a group consisting of current and voltage.