SEMICONDUCTOR CIRCUIT, D/A CONVERTER, MIXER CIRCUIT, RADIO COMMUNICATION DEVICE, METHOD FOR ADJUSTING THRESHOLD VOLTAGE, AND METHOD FOR DETERMINING QUALITY OF TRANSISTOR

• US 20140227989A1
• Filed: 12/17/2013
• Published: 08/14/2014
• Est. Priority Date: 02/13/2013
• Status: Active Grant

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: SUZUKI, Masamichi, NISHINO, Hirotaka, HIRANO, Izumi, MARUKAME, Takao, HIGASHI, Yusuke, MITANI, Yuichiro, Matsuzawa, Kazuya, KURITA, Takahiro, SASAKI, Yuki
• Granted Patent: US 9,083,423 B2
• Time in Patent Office: Days
• US Class Current: 455/326
• CPC Class Codes: H01L 29/792 with charge trapping gate insulator, e.g. MNOS-memory transistors
• CPC Class Codes: H03D 7/1441 using field-effect transistors H03D7/145 takes precedence
• CPC Class Codes: H03D 7/1458 Double balanced arrangements, i.e. where both input signals are differential
• CPC Class Codes: H03M 1/108 Converters having special provisions for facilitating access for testing purposes
• CPC Class Codes: H03M 1/745 with weighted currents
• CPC Class Codes: H04B 1/16 Circuits

Abstract

According to an embodiment, a semiconductor circuit includes a substrate, a tunnel oxide film, a charge storage film, a blocking layer, and plural nodes. The substrate is made of a semiconductor in which two diffusion layers each serving as either a source or a drain are formed. The tunnel oxide film is formed on a region of the substrate between the diffusion layers. The charge storage film is formed on the tunnel oxide layer and stores charge. The blocking layer is formed between the charge storage film and a gate electrode and has layers of a first oxide film, a nitride film and a second oxide film to have a thickness of 5 nm or larger but 15 nm or smaller. The nodes allow external application of voltages so that the source and the drain are reversed and allow detection a gate voltage, a drain current and a substrate current.

Claims

1. A semiconductor circuit comprising:

a substrate made of a semiconductor in which two diffusion layers each serving as either a source or a drain are formed;

a tunnel oxide film formed on a region of the substrate between the diffusion layers;

a charge storage film formed on the tunnel oxide layer and configured to store charge;

a blocking layer formed between the charge storage film and a gate electrode, the blocking layer having layers of a first oxide film, a nitride film and a second oxide film to have a thickness of 5 nm or larger but 15 nm or smaller; and

a plurality of nodes allowing external application of voltages so that the source and the drain are reversed and allowing detection a gate voltage, a drain current, and a substrate current.

2. The semiconductor circuit according to claim 1, further comprising:

a detector configured to detect the gate voltage, the drain current and the substrate current via the nodes;

a determining unit configured to determine whether or not a threshold voltage changing with charge stored in the charge storage film has reached a target value and whether or not a total amount of charge flowing through the substrate has reached an upper limit on a basis of the gate voltage, the drain current and the substrate current detected by the detector; and

a control unit configured to control the substrate current to flow so that charge is stored in the charge storage film until the determining unit determines that either the target value or the upper limit has been reached.

3. A D/A converter with multi-bit resolution comprising a plurality of the semiconductor circuits according to claim 1.

4. A mixer circuit comprising a plurality of the semiconductor circuits according to claim 1 that constitutes a pair and receives differential signals.

5. A radio communication device comprising at least one of a D/A converter with multi-bit resolution including a plurality of the semiconductor circuits according to claim 1 and a mixer circuit including a plurality of the semiconductor circuits according to claim 1 that constitutes a pair and receives differential signals.

6. A method for adjusting a threshold voltage of a transistor having a charge storage film between a region of a substrate made of a semiconductor between two diffusion layers formed in the substrate and a gate electrode, the method comprising:

detecting a gate voltage, a drain voltage and a substrate voltage;

determining whether or not a threshold voltage changing with charge stored in the charge storage film has reached a target value and whether or not a total amount of charge flowing through the substrate has reached an upper limit on a basis of the gate voltage, the drain current and the substrate current that are detected; and

controlling the substrate current to flow so that charge is stored in the charge storage film until either the target value or the upper limit is determined to be reached.

7. A method for determining a quality of a transistor having a charge storage film between a region of a substrate made of a semiconductor between two diffusion layers formed in the substrate and a gate electrode, the method comprising:

detecting a gate voltage, a drain voltage and a substrate voltage;

determining whether or not a threshold voltage changing with charge stored in the charge storage film has reached a target value and whether or not a total amount of charge flowing through the substrate has reached an upper limit on a basis of the gate voltage, the drain current and the substrate current that are detected;

controlling the substrate current to flow so that charge is stored in the charge storage film until either the target value or the upper limit is determined to be reached; and

determining as good quality when the target value is reached before the upper limit is reached but determining as bad quality when the upper limit is reached before the target value is reached.