Garbage Collection with Demotion of Valid Data to a Lower Memory Tier

• US 20140229654A1
• Filed: 02/08/2013
• Published: 08/14/2014
• Est. Priority Date: 02/08/2013
• Status: Abandoned Application

• Current Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Original Assignee: Seagate Technology LLC (Seagate Technology Holdings Plc)
• Inventors: Goss, Ryan James, Ebsen, David Scott, Gaertner, Mark Allen
• Application Number:
  US13/762,448
• Publication Number:
  US 20140229654A1
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0238 Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7205 Cleaning, compaction, garbage collection, erase control
• CPC Class Codes: G11C 11/005 comprising combined but independently operative RAM-ROM, RAM-PROM, RAM-EPROM cells
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles

Abstract

Method and apparatus for managing data in a memory. In accordance with some embodiments, a first tier of a multi-tier memory structure is arranged into a plurality of garbage collection units (GCUs). Each GCU is formed from a plurality of non-volatile memory cells, and is managed as a unit. A plurality of data sets is stored in a selected GCU. A garbage collection operation is performed upon the selected GCU by identifying at least one of the plurality of data sets as a valid data set, migrating the valid data set to a non-volatile second tier of the multi-tier memory structure, and invalidating a programmed state of each of the plurality of non-volatile memory cells to prepare the selected GCU for storage of new data. In some embodiments, the invalidating operation involves setting all of the memory cells in the selected GCU to a known storage state.

Claims

1. A method comprising:

arranging a non-volatile first tier of a multi-tier memory structure into a plurality of garbage collection units (GCUs) each comprising a plurality of non-volatile memory cells managed as a unit;

storing a plurality of data sets in a selected GCU; and

performing a garbage collection operation upon the selected GCU by identifying at least one of the plurality of data sets as a valid data set, migrating the valid data set to a different, non-volatile second tier of the multi-tier memory structure, and invalidating a data state of each of the plurality of non-volatile memory cells in the selected GCU to prepare the selected GCU to store new data.

2. The method of claim 1, in which the plurality of non-volatile memory cells in the selected GCU are invalidated by resetting each of said memory cells to a known programmed state.

3. The method of claim 2, in which the resetting of each of said memory cells comprises performing an erasure operation upon said memory cells.

4. The method of claim 2, in which the resetting of each of said memory cells comprises overwriting the same selected logical state to each of said memory cells.

5. The method of claim 1, in which the second tier of the multi-tier memory structure is arranged into a plurality of GCUs each comprising a plurality of non-volatile memory cells, and the migrated valid data set is stored during the garbage collection operation to a second selected GCU in the second tier.

6. The method of claim 1, in which the first tier comprises an upper tier of the memory structure and the second tier comprises a lower tier of the memory structure, the upper tier having a faster data input/output (I/O) unit data transfer rate than a data I/O unit data transfer rate of the lower tier.

7. The method of claim 6, in which the plurality of non-volatile memory cells of the selected GCU in the upper tier comprise rewritable non-volatile memory cells, and the lower tier comprises a second selected GCU to which the migrated valid data set is written, the second selected GCU comprising a plurality of erasable non-volatile memory cells.

8. The method of claim 7, in which each of the rewritable non-volatile memory cells comprises a programmable resistive sense element (RSE) in combination with a switching device.

9. The method of claim 1, in which a second valid data set from the selected GCU is migrated to a second GCU in the first tier during the garbage collection operation.

10. The method of claim 1, in which the multi-tier memory structure comprises a plurality of tiers in a priority order from a fastest memory tier to a slowest memory tier, and the second tier is immediately below the first tier in said priority order.

11. The method of claim 1, in which the garbage collection operation further comprises resetting each of the memory cells of the selected GCU to a common programming state and returning the selected GCU to an allocation pool of available GCUs pending subsequent reallocation for storage of new data sets.

12. An apparatus comprising:

a multi-tier memory structure comprising a plurality of non-volatile memory tiers each having different data transfer attributes and corresponding memory cell constructions, wherein an upper memory tier in the multi-tier memory structure is arranged into a plurality of garbage collection units (GCUs), each GCU comprising a plurality of non-volatile memory cells that are allocated and reset as a unit;

a storage manager adapted to store a plurality of data sets in a selected GCU in the upper memory tier; and

a garbage collection engine adapted to perform a garbage collection operation upon the selected GCU by identifying at least one of the plurality of data sets as a valid data set, demoting the valid data set to a non-volatile lower tier of the multi-tier memory structure, and invalidating a storage state of each of the plurality of non-volatile memory cells in preparation for storage of new data to the selected GCU.

13. The apparatus of claim 12, in which the lower tier of the multi-tier memory structure is arranged into a plurality of GCUs each comprising a plurality of non-volatile memory cells, the demoted valid data set stored during the garbage collection operation to a second selected GCU in the lower tier.

14. The apparatus of claim 12, in which the storage manager is characterized as a data object storage manager which generates a plurality of data objects comprising user data supplied by a requestor for storage in the multi-tier memory structure.

15. The apparatus of claim 12, in which the plurality of memory cells in the selected GCU are characterized as erasable flash memory cells and the cells are reset during the invalidation operation using an erasure operation.

16. The apparatus of claim 12, in which the plurality of memory cells in the selected GCU are characterized as rewritable resistive sense element (RSE) cells and the cells are reset during the invalidation operation by writing the same programmed electrical resistance state to each of the cells.

17. The apparatus of claim 12, in which the lower memory tier is automatically selected as the next immediately lower tier below the upper memory tier in a priority order of the respective memory tiers in the multi-tier memory structure.

18. The apparatus of claim 12, in which the lower memory tier is selected from a plurality of available lower tiers in the memory structure responsive to a data attribute of the demoted valid data set.

19. An apparatus comprising:

a multi-tier memory structure comprising a plurality of non-volatile memory tiers each having different data transfer attributes and corresponding memory cell constructions, wherein an upper memory tier in the multi-tier memory structure is arranged into a plurality of garbage collection units (GCUs), each GCU comprising a plurality of non-volatile memory cells that are allocated and reset as a unit; and

a controller adapted to allocate a selected GCU for storage of data from a GCU allocation pool, to store a plurality of data sets in the allocated selected GCU, and to subsequently garbage collect the selected GCU to return the selected GCU to the GCU allocation pool by demoting a valid data set to a lower memory tier and resetting the plurality of non-volatile memory cells in the selected GCU to a known storage state.

20. The apparatus of claim 19, in which the upper memory tier comprises rewritable non-volatile memory cells and the lower memory tier comprises erasable non-volatile memory cells.