Evaluation Circuit for an Optoelectronic Detector and Method for Recording Fluorescence Events

• US 20140231675A1
• Filed: 09/20/2012
• Published: 08/21/2014
• Est. Priority Date: 09/30/2011
• Status: Active Grant

• Current Assignee: Carl Zeiss Microscopy GmbH (Carl-Zeiss-Stiftung)
• Original Assignee: Carl Zeiss Microscopy GmbH (Carl-Zeiss-Stiftung)
• Inventors: Mhler, Gunter, Schmidt, Dietmar, Holub, Oliver, Hauschild, Robert
• Granted Patent: US 9,377,405 B2
• Time in Patent Office: Days
• US Class Current: 250/459.1
• CPC Class Codes: G01J 1/44 Electric circuits for command of an exposure part G03B7/02
• CPC Class Codes: G01J 3/2889 Rapid scan spectrometers; Time resolved spectrometry
• CPC Class Codes: G01J 3/44 Raman spectrometry; Scattering spectrometry ; Fluorescence spectrometry
• CPC Class Codes: G01N 21/64 Fluorescence; Phosphorescence
• CPC Class Codes: G01N 21/6408 with measurement of decay time, time resolved fluorescence
• CPC Class Codes: G01N 21/6458 Fluorescence microscopy fluorescence microscopes per se G02B21/0076 and G02B21/16
• CPC Class Codes: G02B 21/0076 arrangements using fluorescence or luminescence
• CPC Class Codes: G02B 21/0084 time-scale detection, e.g. strobed, ultra-fast, heterodyne detection

Abstract

An improved evaluation circuit which allows high sensitivity in an economical manner. For this purpose, a shift register having at least one data input, a clock input, a plurality of register stages and at least one data output is provided, wherein the output of the analog-to-digital converter is connected to the data input of the shift register. With a shift register, fluorescent light and scattered light can be temporally distinguished in an economical manner.

Claims

1. :

An evaluation circuit for evaluating the electric signals of an optoelectronic detector, comprising;

an analog-to-digital converter comprising;

an input configured to connect to an output of the detector;

an output configured to output a digital value;

a shift register comprising;

at least one data input;

a clock input;

a plurality of register stages; and

at least one data output;

wherein the output of the analog-to-digital converter is connected to the data input of the shift register.

2. :

The evaluation circuit according to claim 1;

wherein the output of the analog-to-digital converter is also connected to the clock input of the shift register.

3. :

The evaluation circuit according to claim 1, comprising;

a clock generator with a predefined or predefinable clock frequency which is connected to the clock input of the shift register.

4. :

The evaluation circuit according to claim 1, further comprising;

a delay circuit with variably adjustable time delay, the delay circuit comprising;

an input configured to receive a signal indicating a light pulse; and

an output configured to output the signal after a selected delay as a delayed signal;

wherein the output of the delay circuit is connected to the data input of the shift register such that, by outputting the delayed signal, a marking value is presented at the data input in addition to or instead of the digital value.

5. :

The evaluation circuit according to claim 4, further comprising;

a readout circuit comprising;

an input configured to receive a trigger signal;

at least one data input which is connected to the data output of the shift register; and

at least one sum output;

wherein the readout circuit is configured to read out the register stages when the trigger signal is present;

wherein the readout circuit is also configured to;

sum digital values stored before the marking value; and

/or

sum digital values stored after the marking value; and

wherein the readout circuit is further configured to output the summed values to the sum output.

6. :

The evaluation circuit according to claim 1, further comprising;

at least one additional shift register; and

a switching circuit which, for a plurality of consecutive light pulses, is configured to alternately connect the shift registers to the analog-to-digital converter.

7. :

A microscope comprising;

a light source configured for pulsed operation;

at least one of;

a pulse generator configured to control the light source to emit light pulses; and

a pulse monitor configured to monitor the generated light pulses;

an optoelectronic detector; and

an evaluation circuit according to claim 1;

wherein the input of the analog-to-digital converter is connected to the output of the detector or is configured to be connected to the output of the detector by means of a switch.

8. :

The microscope according to claim 7;

wherein the evaluation circuit comprises;

a delay circuit with variably adjustable time delay, the delay circuit comprising;

an input configured to receive a signal indicating a light pulse; and

an output configured to output the signal after a presently selected delay as a delayed signal;

wherein the output of the delay circuit is connected to the data input of the shift register such that, by outputting the delayed signal, a marking value is presented at the data input in addition to or instead of the digital value; and

wherein the signal input of the delay circuit is connected to the pulse generator or to the pulse monitor.

9. :

The microscope according to claim 8;

wherein the delay circuit has a delay corresponding to a duration of the light pulses.

10. :

The microscope according to claim 8, further comprising;

operating means for setting the delay of the delay circuit.

11. :

The microscope according to claim 8;

wherein the evaluation circuit comprises;

a readout circuit comprising;

an input configured to receive a trigger signal;

at least one data input which is connected to the data output of the shift register; and

at least one sum output;

wherein the readout circuit is configured to read out the register stages when the trigger signal is present;

wherein the readout circuit is also configured to;

sum digital values stored before the marking value; and

/or

sum digital values stored after the marking value; and

wherein the readout circuit is further configured to output the summed values to the sum output;

wherein the evaluation circuit is connected via a data bus to a control unit configured to transmit detected fluorescence events; and

wherein the readout circuit is arranged in front of the data bus.

12. :

A microscope comprising;

a light source configured for pulsed operation;

at least one of;

a pulse generator configured to control the light source to emit light pulses; and

a pulse monitor configured to monitor the emitted light pulses;

an optoelectronic detector; and

a delay circuit with variably adjustable time delay, the delay circuit comprising;

an input configured to receive a signal indicating a light pulse; and

an output configured to output the signal after a presently selected delay as a delayed signal;

a deactivation circuit configured to occasionally, at least partially, deactivate the optoelectronic detector;

wherein the deactivation circuit is connected to the output of the delay circuit such that the optoelectronic detector is deactivated by outputting the delayed signal.

13. :

A method for recording fluorescence events by means of an optoelectronic detector, comprising;

radiating light pulses onto a sample by means of a light source;

capturing light from the sample by means of the optoelectronic detector;

converting the captured light into an electric signal and

feeding the electric signal to an analog-to-digital converter to generate a digital value;

outputting the digital value from the analog-to-digital converter;

storing the outputted digital value in an input stage of a shift register.

14. :

The method according to claim 13;

wherein contents of the shift register are shifted by one stage at the occurrence of a non-zero digital value.

15. :

The method according to claim 13;

wherein the contents of the shift register are shifted by one stage repeatedly after a predefined time.

16. :

The method according to claim 13, further comprising;

summing digital values which are stored in the shift register before a marking value; and

/or

summing digital values which are stored in the shift register after a marking value.