Method and Apparatus for Image Sensor Packaging

• US 20140231887A1
• Filed: 02/18/2013
• Published: 08/21/2014
• Est. Priority Date: 02/18/2013
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Chen, Szu-Ying, Wan, Meng-Hsun, Yaung, Dun-Nian, Chen, Pao-Tung, Liu, Jen-Cheng
• Granted Patent: US 8,946,784 B2
• Time in Patent Office: Days
• US Class Current: 257/291
• CPC Class Codes: H01L 2224/08145 the bodies being stacked
• CPC Class Codes: H01L 2224/80895 between electrically conductive surfaces, e.g. copper-copper direct bonding, surface activated bonding
• CPC Class Codes: H01L 2224/80896 between electrically insulating surfaces, e.g. oxide or nitride layers
• CPC Class Codes: H01L 27/146 Imager structures
• CPC Class Codes: H01L 27/14612 involving a transistor
• CPC Class Codes: H01L 27/1462 Coatings
• CPC Class Codes: H01L 27/14621 Colour filter arrangements
• CPC Class Codes: H01L 27/14627 Microlenses
• CPC Class Codes: H01L 27/14634 Assemblies, i.e. Hybrid structures
• CPC Class Codes: H01L 27/14636 Interconnect structures
• CPC Class Codes: H01L 27/14638 Structures specially adapted for transferring the charges across the imager perpendicular to the imaging plane
• CPC Class Codes: H01L 27/1464 Back illuminated imager structures
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 27/14685 Process for coatings or optical elements
• CPC Class Codes: H01L 27/1469 Assemblies, i.e. hybrid integration
• CPC Class Codes: H01L 2924/381 Pitch distance
• CPC Class Codes: H01L 31/18 Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof

Abstract

A backside illuminated image sensor comprises a photodiode and a first transistor in a sensor region and located in a first substrate, wherein the first transistor is electrically coupled to the photodiode. The image sensor further comprises a plurality of logic circuits formed in a second substrate, wherein the second substrate is stacked on the first substrate and the logic circuit are coupled to the first transistor through a plurality of bonding pads, the bonding pads disposed outside of the sensor region.

Claims

1. A device comprising:

a sensor die comprising

a sensor region;

a plurality of pixels disposed within the sensor region; and

a plurality of sensor bond pads disposed outside the sensor region, each of the plurality of sensor bond pads having a surface exposed through a frontside of the sensor die; and

a control circuit die comprising;

at least one sensor control circuit; and

a plurality of control circuit bond pads, each of the plurality of control circuit bond pads bonded to at least one of the plurality of sensor bond pads.

2. The device of claim 1, wherein transistors of the pixels are comprised solely of NMOS transistors or solely of PMOS transistors.

3. The device of claim 1, wherein the pixels comprise one of charge coupled devices, n-type metal oxide semiconductor devices or p-type metal oxide semiconductor devices.

4. The device of claim 1, further comprising a one or more redistribution layers (RDLs), the sensor bond pads disposed in an uppermost dielectric layer of the RDLs.

5. The device of claim 1, the sensor bond pads having a pitch that is one of about 1.0, about 2.0 or about 3.0 times the pitch of the plurality of pixels.

6. The device of claim 1, wherein the at least one sensor control circuit comprises at least a vertical access circuit.

7. The device of claim 6, wherein the at least one sensor control circuit further comprises a readout circuit.

8. The device of claim 1, further comprising:

a plurality of row select lines, each of the plurality of row select lines extending between and electrically connected to a plurality of pixels in a row and further electrically connected to a sensor bond pad; and

a plurality of output lines, each of the plurality of output lines extending between and electrically connected to a plurality of pixels in a column and further electrically connected to a sensor bond pad.

9. A sensor device comprising:

a sensor region;

a plurality of backside illuminated pixels disposed within the sensor region;

a plurality of sensor bond pads disposed outside the sensor region, each of the plurality of sensor bond pads having an exposed surface;

a plurality of row select lines, each of the plurality of row select lines electrically connected to a plurality of pixels in a row and extending from within the sensor region to outside of the sensor region, each of the plurality of row select lines further electrically connected to a sensor bond pad; and

a plurality of output lines, each of the plurality of output lines electrically connected to a plurality of pixels in a column extending from within the sensor region to outside of the sensor region, each of the plurality of output lines electrically connected to a sensor bond pad.

10. The sensor device of claim 9, wherein transistors of the backside illuminated pixels are comprised solely of NMOS transistors or solely of PMOS transistors.

11. The sensor device of claim 9, wherein transistors disposed on the sensor device are comprised solely of NMOS transistors or solely of PMOS transistors.

12. The sensor device of claim 9, wherein the backside illuminated pixels comprise one of charge coupled devices, n-type metal oxide semiconductor devices or p-type metal oxide semiconductor devices.

13. The sensor device of claim 9, wherein the sensor region has four sides and the bond pads are arranged into a plurality of bond pad groups, at least one of the plurality of bond pad groups disposed at each side of the sensor region and outside of the sensor region.

14. The sensor device of claim 9, each of the plurality of pixels comprising a reset transistor having a gate, at least one sensor bond pad electrically connected to a gate of a reset transistor of at least one of the plurality of pixels.

15-20. -20. (canceled)

21. A device, comprising:

a plurality of backside illuminated pixels disposed within a sensor region of a sensor die;

a plurality of sensor bond pads disposed in the sensor die and outside the sensor region, each of the plurality of sensor bond pads having a surface exposed at the frontside of the sensor die;

a plurality of row select lines, each of the plurality of row select lines electrically connecting a plurality of the pixels in a row to a respective one of the plurality of sensor bond pads;

a plurality of output lines, each of the plurality of output lines electrically connecting a plurality of pixels in a column to a respective one of the plurality of sensor bond pads, at least one sensor control circuit disposed in a control circuit die; and

a plurality of control circuit bond pads disposed in the control circuit die, each of the control circuit bond pads having a surface exposed at a frontside of the control circuit die;

wherein each of the plurality of control circuit bond pads are coupled to a respective one of the plurality of sensor bond pads; and

wherein the sensor region is substantially free of metal features exposed at the frontside of the sensor die.

22. The device of claim 21, wherein the sensor region has four sides and the sensor bond pads are arranged into a plurality of bond pad groups, at least one of the plurality of bond pad groups disposed at each side of the sensor region.

23. The device of claim 22, wherein each of the plurality of bond pad groups comprises two or more rows, each of the two or more rows having two or more sensor bond pads, wherein the two or more rows in each of the plurality of bond pads groups are substantially parallel to each other and to one of the four sides of the sensor region.

24. The device of claim 21,wherein the sensor circuit has a first redistribution layer (RDL) disposed at the frontside of the sensor die;

wherein the control circuit die comprises a second RDL disposed at the frontside of the control circuit die;

wherein the sensor bond pads are exposed at a frontside of the first RDL;

wherein the control circuit bond pads are exposed at a frontside of the second RDL; and

wherein the frontside of the first RDL is bonded to the frontside of the second RDL.

25. The device of claim 24, wherein the sensor bond pads are bonded to the control circuit bond pads.

26. The device of claim 21, wherein the control circuit die comprises at least a vertical access circuit and a readout circuit, each in signal communication with the plurality of pixels through the sensor bond pads.